公开(公告)号：US20230100573A1

公开(公告)日：2023-03-30

申请号：US17742184

申请日：2022-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WONSEB JEONG ,  HEE HYUN NAM ,  YOUNGGEON YOO ,  JEONGHO LEE ,  YOUNHO JEON ,  IPOOM JEONG ,  CHANHO YOON

IPC: G06F3/06

Abstract: A memory device includes; a first memory of first type, a second memory of second type different from the first type, and a memory controller. The memory controller receives an access request and workload information related to work of an external processor, processes the access request using the workload information, and accesses at least one of the first memory and the second memory in response to the access request.

公开(公告)号：US20210081204A1

公开(公告)日：2021-03-18

申请号：US16879120

申请日：2020-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNHO JEON ,  YOUNGJIN CHO ,  HEE HYUN NAM ,  HYO-DEOK SHIN

IPC: G06F9/30 ,  G06F9/54 ,  G06F12/02 ,  G06F1/08 ,  G06F1/12 ,  G06K9/62

Abstract: A memory module includes a device controller that communicates with a host device based on a first interface including a first clock signal, a first data signal, and a first data strobe signal and operates in one of a first operation mode or a second operation mode depending on an operation mode control value from the host device, and a memory device that communicates with the device controller based on a second interface including a second data signal and a second data strobe signal. The device controller includes a logic circuit that transmits a predetermined training result value to the host device depending on a training control value from the host device, when a training is performed on a third interface being a virtual interface recognized by the host device in the first operation mode.