摘要:
A semiconductor memory module includes a volatile memory device, a nonvolatile memory device, data buffers, and a controller. The controller outputs first data read from the volatile memory device or the nonvolatile memory device to an external device through the data buffers, and writes second data received from the external device through the data buffers in the volatile memory device or the nonvolatile memory device. The controller performs a failover operation depending on a failover request that includes fail information indicating a position of a failed data buffer among the data buffers. In the failover operation, the controller conveys third data associated with the failed data buffer to the external device through a failover data buffer among the data buffers.
摘要:
A method of operating a memory controller is provided. The method of operating a memory controller according to an exemplary embodiment of the present inventive concepts includes sequentially receiving, by the memory controller, first data segments each having a first size from a host, sequentially storing, by the memory controller, the first data segments in the buffer until a sum of sizes of changed data among data stored in a buffer included in the memory controller is a second size, and programming, by the memory controller, the changed data having the second size in a memory space of a non-volatile memory as a second data segment.
摘要:
A storage device includes a nonvolatile memory and a controller. The controller includes a job manager circuit and a processor. The job manager circuit manages a first-type job associated with the nonvolatile memory, and the processor processes a second-type job associated with the nonvolatile memory. The job manager circuit manages the first-type job without intervention of the processor. The processor provides a management command to the job manager circuit in response to a notification received from the job manager circuit, such that the second-type job is processed.
摘要:
A storage device includes nonvolatile memories and a device controller configured to store data being received from an external device in an internal RAM, according to a command and an address being received from the external device. The device controller controls the nonvolatile memories according to the data stored in the internal RAM, distinguishes whether phase bits received with the data and also stored in the internal RAM are valid, and processes the data stored in the internal RAM when the phase bits are valid.
摘要:
A method of operating a memory module can include receiving, at the memory module, an active command and an associated row address that indicates that the active command is directed to a volatile memory device included in the memory module or to a non-volatile memory device included in the memory module. The volatile memory device or the non-volatile memory device can be activated based on the associated row address in response to the active command. Status information can be provided at the memory module indicating readiness of the memory module for receipt of an operation command associated with the active command and the associated row address
摘要:
The nonvolatile memory module includes at least one nonvolatile memory, and a device controller including a RAM to store data exchanged between a host and the at least one nonvolatile memory and a DIMM controller to control data exchange between the RAM and the at least one nonvolatile memory. An allocation for an access area at an access to the RAM is performed during a write transaction in which data is recorded at the RAM and is released during a read transaction of the recorded data.
摘要:
A memory device includes; a first memory of first type, a second memory of second type different from the first type, and a memory controller. The memory controller receives an access request and workload information related to work of an external processor, processes the access request using the workload information, and accesses at least one of the first memory and the second memory in response to the access request.
摘要:
A memory module includes a device controller that communicates with a host device based on a first interface including a first clock signal, a first data signal, and a first data strobe signal and operates in one of a first operation mode or a second operation mode depending on an operation mode control value from the host device, and a memory device that communicates with the device controller based on a second interface including a second data signal and a second data strobe signal. The device controller includes a logic circuit that transmits a predetermined training result value to the host device depending on a training control value from the host device, when a training is performed on a third interface being a virtual interface recognized by the host device in the first operation mode.