SEMICONDUCTOR MEMORY MODULE, SEMICONDUCTOR MEMORY SYSTEM, AND METHOD OF ACCESSING SEMICONDUCTOR MEMORY MODULE

    公开(公告)号:US20190138413A1

    公开(公告)日:2019-05-09

    申请号:US15996482

    申请日:2018-06-03

    发明人: HEE HYUN NAM

    IPC分类号: G06F11/20

    摘要: A semiconductor memory module includes a volatile memory device, a nonvolatile memory device, data buffers, and a controller. The controller outputs first data read from the volatile memory device or the nonvolatile memory device to an external device through the data buffers, and writes second data received from the external device through the data buffers in the volatile memory device or the nonvolatile memory device. The controller performs a failover operation depending on a failover request that includes fail information indicating a position of a failed data buffer among the data buffers. In the failover operation, the controller conveys third data associated with the failed data buffer to the external device through a failover data buffer among the data buffers.

    STORAGE DEVICE
    4.
    发明申请
    STORAGE DEVICE 有权
    储存设备

    公开(公告)号:US20160364153A1

    公开(公告)日:2016-12-15

    申请号:US15055779

    申请日:2016-02-29

    IPC分类号: G06F3/06

    CPC分类号: G11C16/00 G06F11/00

    摘要: A storage device includes nonvolatile memories and a device controller configured to store data being received from an external device in an internal RAM, according to a command and an address being received from the external device. The device controller controls the nonvolatile memories according to the data stored in the internal RAM, distinguishes whether phase bits received with the data and also stored in the internal RAM are valid, and processes the data stored in the internal RAM when the phase bits are valid.

    摘要翻译: 存储装置包括非易失性存储器和被配置为根据从外部设备接收的命令和地址将从外部设备接收的数据存储在内部RAM中的设备控制器。 设备控制器根据存储在内部RAM中的数据来控制非易失性存储器,区分在数据中存储的并且存储在内部RAM中的相位是否有效,并且当相位有效时处理存储在内部RAM中的数据 。

    METHODS OF OPERATING MIXED DEVICE TYPE MEMORY MODULES, AND PROCESSORS AND SYSTEMS CONFIGURED FOR OPERATING THE SAME
    5.
    发明申请
    METHODS OF OPERATING MIXED DEVICE TYPE MEMORY MODULES, AND PROCESSORS AND SYSTEMS CONFIGURED FOR OPERATING THE SAME 审中-公开
    混合器件类型存储器模块的操作方法以及用于操作其的处理器和系统

    公开(公告)号:US20170060416A1

    公开(公告)日:2017-03-02

    申请号:US15188183

    申请日:2016-06-21

    IPC分类号: G06F3/06 G06F12/06

    摘要: A method of operating a memory module can include receiving, at the memory module, an active command and an associated row address that indicates that the active command is directed to a volatile memory device included in the memory module or to a non-volatile memory device included in the memory module. The volatile memory device or the non-volatile memory device can be activated based on the associated row address in response to the active command. Status information can be provided at the memory module indicating readiness of the memory module for receipt of an operation command associated with the active command and the associated row address

    摘要翻译: 操作存储器模块的方法可以包括在存储器模块处接收活动命令和相关联的行地址,其指示活动命令被引导到包括在存储器模块中的易失性存储器装置或非易失性存储器装置 包含在内存模块中。 响应于活动命令,可以基于相关联的行地址来激活易失性存储器件或非易失性存储器件。 可以在存储器模块处提供状态信息,指示存储器模块的准备状态用于接收与活动命令相关联的操作命令和相关联的行地址

    NONVOLATILE MEMORY MODULE AND STORAGE SYSTEM HAVING THE SAME
    6.
    发明申请
    NONVOLATILE MEMORY MODULE AND STORAGE SYSTEM HAVING THE SAME 审中-公开
    非易失性存储器模块和存储系统

    公开(公告)号:US20160357481A1

    公开(公告)日:2016-12-08

    申请号:US15132466

    申请日:2016-04-19

    IPC分类号: G06F3/06

    摘要: The nonvolatile memory module includes at least one nonvolatile memory, and a device controller including a RAM to store data exchanged between a host and the at least one nonvolatile memory and a DIMM controller to control data exchange between the RAM and the at least one nonvolatile memory. An allocation for an access area at an access to the RAM is performed during a write transaction in which data is recorded at the RAM and is released during a read transaction of the recorded data.

    摘要翻译: 非易失性存储器模块包括至少一个非易失性存储器和包括RAM的设备控制器,用于存储在主机与至少一个非易失性存储器之间交换的数据,以及DIMM控制器,用于控制RAM与至少一个非易失性存储器之间的数据交换 。 在访问RAM的访问区域的分配在RAM中被记录数据的写入事务期间执行,并且在记录数据的读取事务期间被释放。

    MEMORY MODULE AND OPERATING METHOD THEREOF

    公开(公告)号:US20210081204A1

    公开(公告)日:2021-03-18

    申请号:US16879120

    申请日:2020-05-20

    摘要: A memory module includes a device controller that communicates with a host device based on a first interface including a first clock signal, a first data signal, and a first data strobe signal and operates in one of a first operation mode or a second operation mode depending on an operation mode control value from the host device, and a memory device that communicates with the device controller based on a second interface including a second data signal and a second data strobe signal. The device controller includes a logic circuit that transmits a predetermined training result value to the host device depending on a training control value from the host device, when a training is performed on a third interface being a virtual interface recognized by the host device in the first operation mode.