公开(公告)号：US09759741B2

公开(公告)日：2017-09-12

申请号：US14863703

申请日：2015-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sooyong Park ,  Yong chul Jang ,  Kijae Song

IPC: G01R1/04 ,  G01R31/28

CPC classification number: G01R1/0408 ,  G01R31/2889 ,  H01L2224/16225

Abstract: Provided is a test board including a main board which is configured to be connected to a plurality of devices-under-test (DUTs) and includes a plurality of test signal paths for transmitting a plurality of test signals input from an external tester to pins of at least one of the DUTs or transmitting a test result from the DUT to the tester, and a farm board which is connected to the main board and configured to mount therein a plurality of passive elements which are configured to be connected to at least one of the pins of the DUT through at least one of the test signal paths of the main board, when a test operation is performed, thereby improving a power integrity property or a signal integrity property in the test operation.