公开(公告)号：US20190088717A1

公开(公告)日：2019-03-21

申请号：US15711075

申请日：2017-09-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Chao Feng YEH ,  Jongsun SEL ,  Zhen CHEN

IPC: H01L27/24 ,  H01L45/00

Abstract: Doped semiconductor strips, a planar insulating spacer layer, a gate conductor material layer, and a dielectric cap layer are formed over a substrate. A two-dimensional array of openings is formed through the dielectric cap layer and the gate electrode material layer. Gate dielectrics are formed in the two-dimensional array of openings, and vertical semiconductor channels are formed on each of the gate dielectrics. Gate divider rail structures are formed through the gate conductor material layer. The gate divider rail structures divide the gate conductor material layer into a one-dimensional array of gate electrode lines. Each of the gate electrode lines includes a one-dimensional array of openings arranged along a horizontal direction to form a two-dimensional array of hole-type surrounding gate vertical field effect transistors.

公开(公告)号：US20190103467A1

公开(公告)日：2019-04-04

申请号：US15720490

申请日：2017-09-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Seje TAKAKI ,  Jongsun SEL ,  Hisakazu OTOI ,  Chao Feng YEH

IPC: H01L29/417 ,  H01L27/02 ,  H01L27/11

Abstract: A stack including doped semiconductor strips, a one-dimensional array of gate electrode strips, and a dielectric matrix layer is formed over a substrate. A two-dimensional array of openings is formed through the dielectric matrix layer and the one-dimensional array of gate electrode strips. A two-dimensional array of tubular gate electrode portions is formed in the two-dimensional array of openings. Each of the tubular gate electrode portions is formed directly on a respective one of the gate electrode strips. Gate dielectrics are formed on inner sidewalls of the tubular gate electrode portions. Vertical semiconductor channels are formed within each of the gate dielectrics by deposition of a semiconductor material. A two-dimensional array of vertical field effect transistors including surrounding gate electrodes is formed.