公开(公告)号：US20180331117A1

公开(公告)日：2018-11-15

申请号：US15593820

申请日：2017-05-12

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Monica TITUS ,  Zhixin CUI ,  Senaka KANAKAMEDALA ,  Yao-Sheng LEE ,  Chih-Yu LEE

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

Abstract: A joint level dielectric material layer is formed over a first alternating stack of first insulating layers and first spacer material layers. A first memory opening is formed with a tapered sidewall of the joint level dielectric material layer. A second alternating stack of second insulating layers and second spacer material layers is formed over the joint level dielectric material layer. An inter-tier memory opening is formed, which includes a volume of an second memory opening that extends through the second alternating stack and a volume of the first memory opening. A memory film and a semiconductor channel are formed in the inter-tier memory opening with respective tapered portions overlying the tapered sidewall of the joint level dielectric material layer.