公开(公告)号：US20200098787A1

公开(公告)日：2020-03-26

申请号：US16423500

申请日：2019-05-28

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ryosuke KANEKO

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11565 ,  H01L23/522 ,  H01L23/528 ,  H01L21/28 ,  H01L21/311 ,  H01L21/768

Abstract: A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips located over a substrate, generally extending along a first horizontal direction, and laterally spaced apart from each other along a second horizontal direction by width-modulated line trenches, memory films located on a respective sidewall of the alternating stacks, the memory films containing a charge storage layer and blocking dielectric which generally extend along the first horizontal direction and laterally undulate along the second horizontal direction, and a plurality of discrete vertical semiconductor channels located on a sidewall of a respective one of the memory films.

公开(公告)号：US20200219895A1

公开(公告)日：2020-07-09

申请号：US16241171

申请日：2019-01-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Mitsuteru MUSHIGA ,  Kenji SUGIURA ,  Akio NISHIDA ,  Ryosuke KANEKO ,  Michiaki SANO

IPC: H01L27/11582 ,  H01L21/8234

Abstract: An alternating stack of insulating layers and spacer material layers is formed over a source-level sacrificial layer overlying a substrate. The spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers. Memory stack structures including a respective vertical semiconductor channel and a respective memory film are formed through the alternating stack. A source-level cavity is formed by removing the source-level sacrificial layer. Semiconductor pillar structures may be used to provide mechanical support to the alternating stack during formation of the source-level cavity. A source-level semiconductor material layer can be formed in the source-level cavity. The source-level semiconductor material layer adjoins bottom end portions of the vertical semiconductor channels and laterally surrounds the semiconductor pillar structures. The source-level semiconductor material layer may be electrically isolated from a substrate semiconductor material layer in the substrate by a series connection of two p-n junctions having opposite polarities.