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公开(公告)号:US12279445B2
公开(公告)日:2025-04-15
申请号:US17562635
申请日:2021-12-27
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Srinivas Pulugurtha , Yanli Zhang , Johann Alsmeier , Mitsuhiro Togo
Abstract: A semiconductor structure includes a semiconductor substrate containing a shallow trench isolation structure that laterally surrounds a transistor active region, at least one line trench vertically extending into the semiconductor substrate, and a source region and a drain region located in the transistor active region. A contoured channel region continuously extends from the source region to the drain region underneath the at least one line trench. A gate dielectric contacts all surfaces of the at least one line trench and extends over an entirety of the contoured channel region. A gate electrode containing at least one fin portion overlies the gate dielectric.
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公开(公告)号:US11805649B2
公开(公告)日:2023-10-31
申请号:US17385728
申请日:2021-07-26
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Srinivas Pulugurtha , Johann Alsmeier , Yanli Zhang , James Kai
IPC: H01L27/11582 , H01L27/11556 , H01L21/762 , H01L29/10 , H01L21/3213 , H01L21/8234 , H01L21/308 , H01L21/311 , H10B43/27 , H10B41/27
CPC classification number: H10B43/27 , H01L21/308 , H01L21/31144 , H01L21/32134 , H01L21/76224 , H01L21/823412 , H01L21/823418 , H01L29/1037 , H10B41/27
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located within a respective one of the memory openings, and at least one drain-select-level isolation structure vertically extending through at least a topmost electrically conductive layer among the electrically conductive layers. The at least one drain-select-level isolation structure may include wiggles and cut through upper portions of at least some of the memory opening fill structures, or may include a vertically-extending dielectric material portion and laterally-protruding dielectric material portions adjoined to the vertically-extending dielectric material portion and laterally protruding into lateral recesses located adjacent to the at least the topmost electrically conductive layer.
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