公开(公告)号：US20190288192A1

公开(公告)日：2019-09-19

申请号：US15924944

申请日：2018-03-19

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yuji TAKAHASHI ,  Vincent SHIH ,  Christopher PETTI

IPC: H01L45/00

Abstract: A phase change memory device includes first conductive rails laterally extending along a first horizontal direction over a substrate, a rectangular array of memory pillar structures overlying top surfaces of the first conductive rails, and second conductive rails laterally extending along a second horizontal direction and overlying top surfaces of the rectangular array of memory pillar structures. Each memory pillar structure includes a vertical stack of structural elements including, from one end to another, a selector-side conductive element, a selector element, a selector-memory conductive element, a phase change memory element, and a memory-side conductive element. At least one structural element within the vertical stack is a laterally constricted structural element having laterally recessed sidewalls relative to sidewalls of a respective immediately vertically underlying structural element.

公开(公告)号：US20190259772A1

公开(公告)日：2019-08-22

申请号：US15898571

申请日：2018-02-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yuji TAKAHASHI ,  Satoru MAYUZUMI ,  Vincent SHIH

IPC: H01L27/11556 ,  H01L27/102 ,  H01L27/06 ,  H01L21/822 ,  G11C16/04 ,  H01L45/00

Abstract: A memory device includes first conductive rails laterally extending along a first horizontal direction over a substrate, a rectangular array of first memory pillar structures, each containing a memory element, overlying top surfaces of the first conductive rails, second conductive rails laterally extending along a second horizontal direction and overlying top surfaces of the rectangular array of first memory pillar structures, and a one-dimensional array of first cavities free of solid material portions therein, laterally extending along the second horizontal direction and located between neighboring pairs of the second conductive rails.

公开(公告)号：US20190006418A1

公开(公告)日：2019-01-03

申请号：US15635321

申请日：2017-06-28

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Jongsun SEL ,  Mitsuteru MUSHIGA ,  Vincent SHIH ,  Akio NISHIDA ,  Tuan PHAM

IPC: H01L27/24 ,  H01L45/00 ,  H01L23/522 ,  H01L23/528

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, resistive memory elements located in the alternating stack in first and second array regions and contact via structures located in a contact region between the first and the second array regions. The contact via structures have different depths and contact different electrically conductive layers. Support pillars are located in the contact region and extending through the alternating stack. At least one conduction channel area is located between the contact via structures in the contact region. The conduction channel area contains no support pillars, and all electrically conductive layers in the conduction channel area are continuous from the first array region to the second array region.