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公开(公告)号:US20190259772A1
公开(公告)日:2019-08-22
申请号:US15898571
申请日:2018-02-17
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yuji TAKAHASHI , Satoru MAYUZUMI , Vincent SHIH
IPC: H01L27/11556 , H01L27/102 , H01L27/06 , H01L21/822 , G11C16/04 , H01L45/00
Abstract: A memory device includes first conductive rails laterally extending along a first horizontal direction over a substrate, a rectangular array of first memory pillar structures, each containing a memory element, overlying top surfaces of the first conductive rails, second conductive rails laterally extending along a second horizontal direction and overlying top surfaces of the rectangular array of first memory pillar structures, and a one-dimensional array of first cavities free of solid material portions therein, laterally extending along the second horizontal direction and located between neighboring pairs of the second conductive rails.
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2.
公开(公告)号:US20200286901A1
公开(公告)日:2020-09-10
申请号:US16291673
申请日:2019-03-04
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Shigeki SHIMOMURA , Satoru MAYUZUMI , Hiroyuki OGAWA
IPC: H01L27/1159 , H01L27/11597 , H01L23/522 , H01L29/51 , H01L29/78 , H01L29/66 , G11C11/16
Abstract: A vertically alternating sequence of multi-fingered silicon-germanium layers and multi-fingered silicon layers is formed over a substrate. The multi-fingered silicon-germanium layers include silicon-germanium wires, and the multi-fingered silicon layers include silicon wires. Tubular memory films and multi-fingered gate electrodes are formed. Each gate electrode includes a respective gate electrode bar which overlies the silicon wires and a respective set of vertically-extending gate electrode fingers which is adjoined to a bottom portion of the respective gate electrode bar and spaced apart by the silicon wires. The multi-fingered silicon-germanium layers are removed selective to multi-fingered silicon layers. First active regions are formed at an end portion of each of the silicon wires. Second active regions are formed on silicon plate portions of the multi-fingered silicon layers.
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3.
公开(公告)号:US20200006431A1
公开(公告)日:2020-01-02
申请号:US16021694
申请日:2018-06-28
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Satoru MAYUZUMI , Wei Kuo SHIH , Yuji TAKAHASHI
IPC: H01L27/24 , H01L23/528 , H01L23/532 , H01L45/00 , H01L43/02 , H01L43/12 , H01L27/22
Abstract: A memory device includes first conductive rails laterally extending along a first horizontal direction over a substrate, where the first conductive rails include a fill portion, and a first cobalt-containing cap liner contacting a top surface of the fill portion, a rectangular array of first memory pillar structures overlying top surfaces of the first conductive rails, where each first memory pillar structure includes a respective first resistive memory element, and second conductive rails laterally extending along a second horizontal direction and overlying top surfaces of the rectangular array of first memory pillar structures.
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