公开(公告)号：US20180047449A1

公开(公告)日：2018-02-15

申请号：US15614671

申请日：2017-06-06

申请人： SANG-WAN NAM ,  SANG-IN PARK

发明人： SANG-WAN NAM ,  SANG-IN PARK

IPC分类号： G11C16/08 ,  G11C8/06 ,  G11C11/4099 ,  G11C16/34 ,  G11C11/408

CPC分类号： G11C16/08 ,  G11C8/06 ,  G11C11/4082 ,  G11C11/4087 ,  G11C11/4099 ,  G11C16/10 ,  G11C16/34 ,  G11C16/3454 ,  G11C29/028 ,  H03K19/02

摘要： A nonvolatile memory device includes a memory cell array, a row decoder circuit, a page buffer circuit, and a control logic circuit. The control logic circuit controls the row decoder circuit and the page buffer circuit to perform: (1) a pre-program of sequentially selecting a plurality of memory blocks and increasing threshold voltages of string selection transistors or ground selection transistors of the selected memory block and (2) after the pre-program is completed, a main program of sequentially selecting the plurality of memory blocks, programming string selection transistors or ground selection transistors of the selected memory block, and performing a verification by using a verification voltage.