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    SYSTEMS AND METHODS FOR INTER-CELL INTERFERENCE MITIGATION IN A FLASH MEMORY
    1.
    发明申请
    SYSTEMS AND METHODS FOR INTER-CELL INTERFERENCE MITIGATION IN A FLASH MEMORY 审中-公开

    公开(公告)号：US20190179703A1

    公开(公告)日：2019-06-13

    申请号：US16274156

    申请日：2019-02-12

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Fan Zhang ,  Shu Li ,  Jun Xiao ,  Haitao Xia

    IPC: G06F11/10 ,  G11C29/52 ,  G11C29/02

    Abstract: The present inventions are related to systems and methods for accessing data from a flash memory, and more particularly to systems and methods for inter-cell interference handling in a flash memory. The systems and methods may include a soft information correction circuit that is operable to receive soft information corresponding to information accessed from a block of memory cells, and modify the soft information based upon a variance of the soft information and a median of the soft information to create corrected soft information, the corrected soft information being used to mitigate inter-cell interference in the block of memory cells.

    SYSTEMS AND METHODS FOR INTER-CELL INTERFERENCE MITIGATION IN A FLASH MEMORY
    3.
    发明申请
    SYSTEMS AND METHODS FOR INTER-CELL INTERFERENCE MITIGATION IN A FLASH MEMORY 审中-公开
    用于闪速存储器中的细胞间干扰减轻的系统和方法

    公开(公告)号：US20160124808A1

    公开(公告)日：2016-05-05

    申请号：US14994001

    申请日：2016-01-12

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Fan Zhang ,  Shu Li ,  Jun Xiao ,  Haitao Xia

    IPC: G06F11/10 ,  G11C29/52

    CPC classification number: G06F11/1068 ,  G06F11/1048 ,  G11C16/00 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/00

    Abstract: The present inventions are related to systems and methods for accessing data from a flash memory, and more particularly to systems and methods for inter-cell interference handling in a flash memory. The systems and methods may include a soft information correction circuit that is operable to receive soft information corresponding to information accessed from a block of memory cells, and modify the soft information based upon a variance of the soft information and a median of the soft information to create corrected soft information, the corrected soft information being used to mitigate inter-cell interference in the block of memory cells.

    Abstract translation: 本发明涉及用于从闪速存储器访问数据的系统和方法，更具体地涉及用于闪存中的小区间干扰处理的系统和方法。 系统和方法可以包括软信息校正电路，其可操作以接收对应于从存储器单元块访问的信息的软信息，并且基于软信息的方差和软信息的中值来修改软信息， 创建校正的软信息，校正的软信息用于减轻存储器单元块中的小区间干扰。

    Systems and methods for enhanced data recovery in a solid state memory system
    4.
    发明授权
    Systems and methods for enhanced data recovery in a solid state memory system 有权
    用于在固态存储器系统中增强数据恢复的系统和方法

    公开(公告)号：US09164828B2

    公开(公告)日：2015-10-20

    申请号：US14047423

    申请日：2013-10-07

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Haitao Xia ,  Fan Zhang ,  Shu Li ,  Jun Xiao

    IPC: G11C29/00 ,  G06F11/10 ,  H03M13/11 ,  H03M13/37 ,  H03M13/00

    CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1008 ,  G06F11/1012 ,  G11C29/52 ,  H03M13/1111 ,  H03M13/1128 ,  H03M13/1142 ,  H03M13/3723 ,  H03M13/3746 ,  H03M13/6337

    Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for accessing a data set from a solid state storage device, using a data decoding circuit to apply a data decoding algorithm to the data set to yield a decoded output, where the decoded output includes at least one error, identifying at least one critical location in the data set, estimating a voltage associated with the data in the data set corresponding to the critical location, calculating soft information corresponding to the critical location based at least in part on the estimated voltage, and re-applying the data decoding algorithm to the data set guided by the soft information to yield an updated decoded output.

    Abstract translation: 更具体地涉及用于从固态存储装置访问数据集的系统和方法，使用数据解码电路将数据解码算法应用于数据集以产生解码的输出，其中 所述解码的输出包括至少一个错误，识别所述数据集中的至少一个关键位置，估计与所述关键位置对应的数据集中的数据相关联的电压，至少部分地计算对应于所述关键位置的软信息 估计电压，并将数据解码算法重新应用于由软信息引导的数据集，以产生更新的解码输出。

    Systems and methods for inter-cell interference mitigation in a flash memory
    9.
    发明授权
    Systems and methods for inter-cell interference mitigation in a flash memory 有权
    闪存中小区间干扰减轻的系统和方法

    公开(公告)号：US09235469B2

    公开(公告)日：2016-01-12

    申请号：US13912063

    申请日：2013-06-06

    Applicant: SEAGATE TECHNOLOGY LLC

    Inventor： Fan Zhang ,  Shu Li ,  Jun Xiao ,  Haitao Xia

    IPC: H03M13/00 ,  G06F11/10 ,  G11C29/02 ,  G11C16/00 ,  G11C29/04

    CPC classification number: G06F11/1068 ,  G06F11/1048 ,  G11C16/00 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/00

    Abstract: The present inventions are related to systems and methods for accessing data from a flash memory, and more particularly to systems and methods for inter-cell interference handling in a flash memory. The systems and methods include receiving soft information corresponding to a series of voltage levels accessed from a block of flash memory cells, calculating corrected soft information based upon the received soft information and a variance of the soft information, and applying a data decoding algorithm to the corrected soft information to yield a data output.

    Abstract translation: 本发明涉及用于从闪速存储器访问数据的系统和方法，更具体地涉及用于闪存中的小区间干扰处理的系统和方法。 所述系统和方法包括接收对应于从闪存单元块访问的一系列电压电平的软信息，基于所接收的软信息和软信息的方差来计算校正的软信息，以及将数据解码算法应用于 校正的软信息以产生数据输出。

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