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公开(公告)号:US11880642B2
公开(公告)日:2024-01-23
申请号:US17930091
申请日:2022-09-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: James Joseph Victory , Thomas Neyer , YunPeng Xiao , Hyeongwoo Jang , Peter Dingenen , Vaclav Valenta , Mehrdad Baghaie Yazdi , Christopher Lawrence Rexer , Stanley Benczkowski , Thierry Bordignon , Wai Lun Chu , Roman Sickaruk
IPC: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08 , G06F119/08 , G06F111/02 , G06F117/12
CPC classification number: G06F30/31 , G06F30/367 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08 , G06F2111/02 , G06F2117/12 , G06F2119/08
Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.
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公开(公告)号:US11481532B2
公开(公告)日:2022-10-25
申请号:US17076039
申请日:2020-10-21
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: James Joseph Victory , Thomas Neyer , YunPeng Xiao , Hyeongwoo Jang , Peter Dingenen , Vaclav Valenta , Tirthajyoti Sarkar , Mehrdad Baghaie Yazdi , Christopher Lawrence Rexer , Stanley Benczkowski , Thierry Bordignon , Wai Lun Chu , Roman Sickaruk
IPC: G06F30/367 , G06F30/31 , G06F30/392 , G06F30/398 , G06N3/04 , G06N3/08 , G06F119/08 , G06F111/02 , G06F117/12
Abstract: Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.
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