CONCEALED GATE TERMINAL SEMICONDUCTOR PACKAGES AND RELATED METHODS

    公开(公告)号:US20220102248A1

    公开(公告)日:2022-03-31

    申请号:US17305396

    申请日:2021-07-07

    Abstract: Semiconductor packages may include a lead frame, one or more semiconductor die coupled with the lead frame, and an interposer coupled with the lead frame and with at least one of the one or more semiconductor die. The interposer in implementations includes an electrically conductive material coupled with an electrically insulative material. The interposer may be coupled with the lead frame through the electrically insulative material such that the electrically conductive material is electrically isolated from the lead frame. The interposer may facilitate a gate node of the package being fully encapsulated within the package without being exposed through an encapsulant of the package. Fully encapsulating the gate node within the package may allow a contact pad of another node to have a larger area exposed through the encapsulant to provide greater heat transfer to a printed circuit board (PCB).

    SEMICONDUCTOR DEVICE PACKAGE WITH CLIP INTERCONNECT AND DUAL SIDE COOLING

    公开(公告)号:US20210351099A1

    公开(公告)日:2021-11-11

    申请号:US17443230

    申请日:2021-07-22

    Abstract: In a general aspect, a packaged semiconductor device apparatus a conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip having a first portion with a first thickness and a second portion with a second thickness. The first thickness can be greater than the second thickness. The first portion can be coupled with the semiconductor die. The device can also include a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip. The device can further include a signal lead that is at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled with the signal lead.

    SEMICONDUCTOR DEVICE PACKAGE WITH CLIP INTERCONNECT AND DUAL SIDE COOLING

    公开(公告)号:US20190393119A1

    公开(公告)日:2019-12-26

    申请号:US16016712

    申请日:2018-06-25

    Abstract: In a general aspect, a packaged semiconductor device apparatus a conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip having a first portion with a first thickness and a second portion with a second thickness. The first thickness can be greater than the second thickness. The first portion can be coupled with the semiconductor die. The device can also include a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip. The device can further include a signal lead that is at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled with the signal lead.

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