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公开(公告)号:US20220102248A1
公开(公告)日:2022-03-31
申请号:US17305396
申请日:2021-07-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Erwin Ian Vamenta ALMAGRO , Maria Clemens Ypil QUINONES , Romel N. MANATAD , Maria Cristina ESTACIO , Elsie Agdon CABAHUG
IPC: H01L23/495 , H01L23/522 , H01L23/31
Abstract: Semiconductor packages may include a lead frame, one or more semiconductor die coupled with the lead frame, and an interposer coupled with the lead frame and with at least one of the one or more semiconductor die. The interposer in implementations includes an electrically conductive material coupled with an electrically insulative material. The interposer may be coupled with the lead frame through the electrically insulative material such that the electrically conductive material is electrically isolated from the lead frame. The interposer may facilitate a gate node of the package being fully encapsulated within the package without being exposed through an encapsulant of the package. Fully encapsulating the gate node within the package may allow a contact pad of another node to have a larger area exposed through the encapsulant to provide greater heat transfer to a printed circuit board (PCB).
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公开(公告)号:US20210351099A1
公开(公告)日:2021-11-11
申请号:US17443230
申请日:2021-07-22
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Maria Cristina ESTACIO , Elsie Agdon CABAHUG , Romel N. MANATAD
IPC: H01L23/367 , H01L23/29 , H01L23/495
Abstract: In a general aspect, a packaged semiconductor device apparatus a conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip having a first portion with a first thickness and a second portion with a second thickness. The first thickness can be greater than the second thickness. The first portion can be coupled with the semiconductor die. The device can also include a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip. The device can further include a signal lead that is at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled with the signal lead.
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公开(公告)号:US20190393119A1
公开(公告)日:2019-12-26
申请号:US16016712
申请日:2018-06-25
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Maria Cristina ESTACIO , Elsie Agdon CABAHUG , Romel N. MANATAD
IPC: H01L23/367 , H01L23/29 , H01L23/495
Abstract: In a general aspect, a packaged semiconductor device apparatus a conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip having a first portion with a first thickness and a second portion with a second thickness. The first thickness can be greater than the second thickness. The first portion can be coupled with the semiconductor die. The device can also include a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip. The device can further include a signal lead that is at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled with the signal lead.
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公开(公告)号:US20200273782A1
公开(公告)日:2020-08-27
申请号:US16506405
申请日:2019-07-09
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Maria Clemens Ypil QUINONES , Elsie Agdon CABAHUG , Jerome TEYSSEYRE
IPC: H01L23/495 , H01L23/31
Abstract: According to an aspect, a semiconductor package includes a substrate having a first surface and a second surface opposite to the first surface, a semiconductor die coupled to the second surface of the substrate, and a molding encapsulating the semiconductor die and a majority of the substrate, where at least a portion of the first surface is exposed through the molding such that the substrate is configured to function as a heat sink.
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公开(公告)号:US20200098870A1
公开(公告)日:2020-03-26
申请号:US16539319
申请日:2019-08-13
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Maria Cristina ESTACIO , Jerome TEYSSEYRE , Elsie Agdon CABAHUG
IPC: H01L29/16 , H01L23/00 , H01L21/56 , H01L23/31 , H01L23/367 , H01L23/495
Abstract: A semiconductor package is disclosed. Specific implementations of a semiconductor package may include: one or more semiconductor die coupled between a baseframe and a clip, the baseframe including a gate pad of the baseframe coupled with a gate pad of the one or more semiconductor die, and a source pad of the baseframe coupled with a source pad of the one or more semiconductor die, where the gate pad of the baseframe extends beyond a perimeter of the one or more semiconductor die.
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公开(公告)号:US20240363471A1
公开(公告)日:2024-10-31
申请号:US18755366
申请日:2024-06-26
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Maria Cristina ESTACIO , Elsie Agdon CABAHUG , Romel N. MANATAD
IPC: H01L23/367 , H01L23/29 , H01L23/495
CPC classification number: H01L23/367 , H01L23/29 , H01L23/49517 , H01L23/49562 , H01L23/49575
Abstract: In a general aspect, a packaged semiconductor device apparatus a conductive paddle, a semiconductor die coupled with the conductive paddle and a conductive clip having a first portion with a first thickness and a second portion with a second thickness. The first thickness can be greater than the second thickness. The first portion can be coupled with the semiconductor die. The device can also include a molding compound encapsulating the semiconductor die and at least partially encapsulating the conductive paddle and the conductive clip. The device can further include a signal lead that is at least partially encapsulated in the molding compound, the second portion of the conductive clip being coupled with the signal lead.
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公开(公告)号:US20230402350A1
公开(公告)日:2023-12-14
申请号:US18454970
申请日:2023-08-24
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Erwin Ian Vamenta ALMAGRO , Maria Clemens Ypil QUINONES , Romel N. MANATAD , Maria Cristina ESTACIO , Elsie Agdon CABAHUG
IPC: H01L23/495 , H01L23/31 , H01L23/522
CPC classification number: H01L23/49541 , H01L23/31 , H01L23/5226
Abstract: Semiconductor packages may include a lead frame, one or more semiconductor die coupled with the lead frame, and an interposer coupled with the lead frame and with at least one of the one or more semiconductor die. The interposer in implementations includes an electrically conductive material coupled with an electrically insulative material. The interposer may be coupled with the lead frame through the electrically insulative material such that the electrically conductive material is electrically isolated from the lead frame. The interposer may facilitate a gate node of the package being fully encapsulated within the package without being exposed through an encapsulant of the package. Fully encapsulating the gate node within the package may allow a contact pad of another node to have a larger area exposed through the encapsulant to provide greater heat transfer to a printed circuit board (PCB).
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公开(公告)号:US20230207411A1
公开(公告)日:2023-06-29
申请号:US18172641
申请日:2023-02-22
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Maria Cristina ESTACIO , Jerome TEYSSEYRE , Elsie Agdon CABAHUG
IPC: H01L23/31 , H01L29/16 , H01L23/00 , H01L21/56 , H01L23/367 , H01L23/495
CPC classification number: H01L23/3107 , H01L29/1608 , H01L24/09 , H01L21/565 , H01L23/367 , H01L23/49524 , H01L23/49582 , H01L2224/02379
Abstract: A semiconductor package is disclosed. Specific implementations of a semiconductor package may include: one or more semiconductor die coupled between a baseframe and a clip, the baseframe including a gate pad of the baseframe coupled with a gate pad of the one or more semiconductor die, and a source pad of the baseframe coupled with a source pad of the one or more semiconductor die, where the gate pad of the baseframe extends beyond a perimeter of the one or more semiconductor die.
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