公开(公告)号：US10475820B2

公开(公告)日：2019-11-12

申请号：US16143970

申请日：2018-09-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junpei Yanaka ,  Kayo Kumakura ,  Masataka Sato ,  Satoru Idojiri ,  Kensuke Yoshizumi ,  Mari Tateishi ,  Natsuko Takase

IPC: H01L27/12 ,  H01L23/29 ,  H01L27/32 ,  H01L51/00

Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.

公开(公告)号：US20150001533A1

公开(公告)日：2015-01-01

申请号：US14313591

申请日：2014-06-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hideaki Kuwabara ,  Yuta Endo ,  Mari Tateishi ,  Masahiro Takahashi

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/04 ,  H01L29/0657 ,  H01L29/42384 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device including an oxide semiconductor. The device has a stacked-layer structure including an oxide semiconductor layer and an insulating layer in contact therewith. The oxide semiconductor layer includes a first layer where a channel is formed and a second layer which is between the first layer and the insulating layer and whose energy of the bottom of the conduction band is closer to the vacuum level than that of the first layer. The second layer serves as a barrier layer preventing formation of defect states between the channel and the insulating layer. The first layer and the second layer include a minute crystal part in which periodic atomic arrangement is not observed macroscopically or long-range order in atomic arrangement is not observed macroscopically. For example, a region with a size of 1 nm to 10 nm includes a crystal part having periodic atomic order.

Abstract translation: 提供包括氧化物半导体的高度可靠的半导体器件。 该器件具有包括氧化物半导体层和与其接触的绝缘层的堆叠层结构。 氧化物半导体层包括其中形成沟道的第一层和位于第一层和绝缘层之间的第二层，其导带底部的能量比第一层更靠近真空度。 第二层用作防止在通道和绝缘层之间形成缺陷状态的阻挡层。 第一层和第二层包括在宏观上没有观察到周期性原子排列的微小晶体部分，宏观上没有观察到原子排列的长距离顺序。 例如，尺寸为1nm至10nm的区域包括具有周期性原子级的晶体部分。

公开(公告)号：US10163940B2

公开(公告)日：2018-12-25

申请号：US15596408

申请日：2017-05-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Kubota ,  Yuji Iwaki ,  Kensuke Yoshizumi ,  Mari Tateishi ,  Natsuko Takase

IPC: H01L29/04 ,  H01L31/036 ,  H01L27/12 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1333 ,  G02F1/1345 ,  H01L27/32

Abstract: A highly reliable display device is provided. The display device includes a first substrate, a first resin layer over the first substrate, a pixel portion and a terminal portion over the first resin layer, a second resin layer over the terminal portion, and a second substrate over the second resin layer. The pixel portion includes a transistor and a display element electrically connected to the transistor. The terminal portion includes a conductive layer. The first resin layer includes an opening. The conductive layer includes a first region that is exposed in the opening in the first resin layer. The second resin layer includes a region overlapping with the first region. The conductive layer is the same layer as at least one of a gate of the transistor and a source and a drain of the transistor.

公开(公告)号：US10096621B2

公开(公告)日：2018-10-09

申请号：US15596412

申请日：2017-05-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junpei Yanaka ,  Kayo Kumakura ,  Masataka Sato ,  Satoru Idojiri ,  Kensuke Yoshizumi ,  Mari Tateishi ,  Natsuko Takase

IPC: H01L27/12 ,  H01L23/29 ,  H01L27/32

Abstract: To provide a peeling method that achieves low cost and high mass productivity. The peeling method includes the steps of: forming a first layer with a photosensitive material over a formation substrate; forming a first region and a second region having a smaller thickness than the first region in the first layer by photolithography to form a resin layer having the first region and the second region; forming a transistor including an oxide semiconductor in a channel formation region over the first region in the resin layer; forming a conductive layer over the second region in the resin layer; and irradiating the resin layer with laser light to separate the transistor and the formation substrate.