-
公开(公告)号：US20190272056A1
公开(公告)日：2019-09-05
申请号：US16419074
申请日：2019-05-22
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Zhengfeng WANG , Shuo FAN
Abstract: The present application discloses a capacitance detecting circuit, a touch device and terminal device, which are beneficial for reducing an area of the capacitance detecting circuit, thereby reducing costs of a chip. The capacitance detecting circuit is connected to a measurement capacitor and where it includes a calibration capacitor; a charging and discharging module including a first current source configured to perform charging or discharging on the measurement capacitor, and a second current source configured to perform charging or discharging on the calibration capacitor; an integrator, configured to convert a capacitance signal of the measurement capacitor into a voltage signal; and a control module, configured to control working states of the charging and discharging module and the integrator.
-
公开(公告)号：US20190036491A1
公开(公告)日：2019-01-31
申请号：US16110127
申请日：2018-08-23
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Shuo FAN
CPC classification number: H03F1/301 , H03F1/0205 , H03F3/45179 , H03F3/45183 , H03F3/72 , H03F2200/297 , H03F2200/312 , H03F2200/447 , H03F2203/45134 , H03F2203/45631 , H03F2203/45726 , H03K19/20
Abstract: The present disclosure discloses a dynamic amplification circuit, including: a first drive circuit, receives a first control signal to generate a first and a second voltage signal; a second drive circuit, receives the first and the second voltage signal to generate a first drive signal; a third drive circuit, receives the first control signal and the first drive signal to generate a second control signal; and a dynamic amplifier DA, controls a first and a second control switch according to the control signals; in a first time period, the first control signal is high level, the second control signal is low level; in a second time period, the opposite is the case; in a third time period, the first and the second control signal are both at low level, a duration of the second time period is inversely proportional to a transconductance of a transistor in a saturation region.
-
Patent Agency Ranking
公开(公告)号：US20190068130A1
公开(公告)日：2019-02-28
申请号：US16147857
申请日：2018-09-30
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Shuo FAN
CPC classification number: H03F1/30 , H03F1/0205 , H03F1/301 , H03F3/04 , H03F3/45085 , H03F3/45295 , H03F2200/129 , H03F2200/447 , H03F2203/45376 , H03F2203/45396
Abstract: A dynamic amplification circuit includes a first drive circuit (310) generates a first driving voltage according to a first control signal and a first driving current; a second drive circuit (320) generates a first driving signal according to the first and a second driving voltage; a third drive circuit (330) generates a second control signal according to the first control signal and the first driving signal; and a dynamic amplifier DA (340) includes a first branch (101) including a first capacitor and a second branch (102) including a second capacitor which are connected by a first resistor (150) and a second resistor (160), an operation state of the DA (340) is controlled through the first and second control signals, a duration of the DA (340) in an amplification phase is proportional to a product of a resistance value of the first resistor and a capacitance value of the first capacitor.
-
公开(公告)号：US20210034179A1
公开(公告)日：2021-02-04
申请号：US17019573
申请日：2020-09-14
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Shuo FAN
Abstract: Provided is a capacitance detection circuit, which has better detection performance. The capacitance detection circuit includes: a first charging and discharging circuit configured to perform charging or discharging on a capacitor to be detected; a second charging and discharging circuit configured to perform charging or discharging on a calibration capacitor; an analog-to-digital conversion circuit configured to continuously sample a voltage difference between the capacitor to be detected and the calibration capacitor in a charging or discharging process to obtain sampled data; and a digital processing circuit configured to detect a capacitance of the capacitor to be detected according to the sampled data.
-
公开(公告)号：US20190278401A1
公开(公告)日：2019-09-12
申请号：US16420146
申请日：2019-05-22
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Zhengfeng WANG , Shuo FAN
Abstract: A capacitance detecting circuit, includes a first front end circuit, a second front end circuit, a control circuit and a processing circuit, wherein the control circuit controls the first front end circuit and the second front end circuit such that the first front end circuit is configured to convert a capacitance signal of a detection capacitor into a first voltage signal through a first calibration capacitor, and the second front end circuit is configured to convert a capacitance signal of the detection capacitor into a second voltage signal through a second calibration capacitor; the processing circuit is calculates a differential signal of the first voltage signal and the second voltage signal to determine a capacitance variation of the detection capacitor according to the differential signal.
-
公开(公告)号：US20190058486A1
公开(公告)日：2019-02-21
申请号：US16168774
申请日：2018-10-23
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Shuo FAN
CPC classification number: H03M1/466 , H03M1/002 , H03M1/1245 , H03M1/129 , H03M1/468
Abstract: An analog-to-digital conversion circuit and method are provided. At a sampling stage, the first capacitor array connects lower electrode plates of N capacitors to a first input voltage, connect lower electrode plates of the other capacitors to a common-mode voltage, and connect upper electrode plates of all the capacitors to the common-mode voltage to sample the first input voltage; in an ith conversion at a conversion stage, the logic circuit controls, the lower electrode plate of an ith capacitor to connect to a reference voltage or a ground voltage, a first comparison voltage output by the first capacitor array approximates a second comparison voltage; and the comparator stores a comparison result between the first and the second comparison voltage to an i+1th flag bit in the logic circuit, and analog-to-digital conversion is completed when i+1 is equal to the total number of capacitors in the first capacitor array.
-
公开(公告)号：US20190020351A1
公开(公告)日：2019-01-17
申请号：US16119739
申请日：2018-08-31
Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
Inventor： Shuo FAN
Abstract: A capacitive successive approximation analog-to-digital converter is provided, where the capacitive successive approximation analog-to-digital converter includes a first capacitor array including N first capacitors; a second capacitor array including N second capacitors; a voltage generation circuit configured to generate a common mode voltage, a reference voltage, a first voltage and a second voltage; a first switch, a second switch, N third switches and N fourth switches; a comparator including a first input end, a second input end and an output end, where upper plates of the N first capacitors are connected to the first input end and upper plates of the N second capacitors are connected to the second input end; and a successive approximation logic controller connected to the output end of the comparator. The capacitive successive approximation analog-to-digital converter in the above technical solution can use 2N capacitors to implement outputting an N-bit binary code.
-
-
-
-
-
-
Search Results
7
records
(took 0.017 seconds)
