APPARATUS AND METHOD FOR PROCESSING DATA
    1.
    发明申请
    APPARATUS AND METHOD FOR PROCESSING DATA 有权
    用于处理数据的装置和方法

    公开(公告)号:US20150188566A1

    公开(公告)日:2015-07-02

    申请号:US14288232

    申请日:2014-05-27

    申请人: SK HYNIX INC.

    IPC分类号: H03M7/30 G06F13/42

    CPC分类号: H03M7/6058 H03M7/48

    摘要: A data processing device includes a compression circuit and a padding circuit. The compression circuit is configured to compare pairs of two contiguous bits within data composed of 2n bits (where n is a natural number), and compress the data based on a result of the comparison. The padding circuit is configured to generate transmission data of 2n bits by padding the compressed data with a dummy pad.

    摘要翻译: 数据处理装置包括压缩电路和填充电路。 压缩电路被配置为比较由2n比特(其中n是自然数)组成的数据内的两个连续比特的对,并且基于比较的结果来压缩数据。 填充电路被配置为通过用虚拟焊盘填充压缩数据来生成2n位的发送数据。

    APPARATUS AND METHOD FOR PROCESSING DATA
    2.
    发明申请
    APPARATUS AND METHOD FOR PROCESSING DATA 有权
    用于处理数据的装置和方法

    公开(公告)号:US20150186309A1

    公开(公告)日:2015-07-02

    申请号:US14286911

    申请日:2014-05-23

    申请人: SK hynix Inc.

    IPC分类号: G06F13/28 G06F13/16

    摘要: A data processing device includes a controller. The controller includes a compression circuit configured to compare a plurality of data groups, each of which has a first burst length and is transmitted in units of an input/output width, with a predetermined pattern, and perform data compression on the data groups based on a result of comparison. The controller further includes a compression data restructuring circuit configured to generate a transmission data group by restructuring the compressed data group to have a second burst length.

    摘要翻译: 数据处理装置包括控制器。 控制器包括:压缩电路,被配置为比较多个数据组,每个数据组具有第一突发长度,并以预定模式以输入/输出宽度为单位发送,并且基于数据组基于 比较的结果。 控制器还包括压缩数据重构电路,该压缩数据重构电路经配置以通过重构压缩数据组以产生第二突发长度来生成传输数据组。

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20150029805A1

    公开(公告)日:2015-01-29

    申请号:US14176026

    申请日:2014-02-07

    申请人: SK HYNIX INC.

    IPC分类号: G11C5/02 G11C5/14

    CPC分类号: G11C5/14 G11C5/025

    摘要: A semiconductor memory device includes a plurality of first regions formed in a line-type and extending in a first direction, and a plurality of second regions and a plurality of third regions arranged between adjacent first regions in a zigzag manner.

    摘要翻译: 一种半导体存储器件包括以线型形成并沿第一方向延伸的多个第一区域和多个第二区域和多个第三区域,其以锯齿形的方式布置在相邻的第一区域之间。