公开(公告)号：US11276761B2

公开(公告)日：2022-03-15

申请号：US16735443

申请日：2020-01-06

申请人： SK hynix Inc.

发明人： Dong-Soo Kim ,  Sung-Won Lim ,  Eun-Jeong Kim ,  Hyun-Jin Chang ,  Keun Heo ,  Jee-Hyun Kim

IPC分类号： H01L29/66 ,  H01L29/423 ,  H01L27/108 ,  H01L29/10 ,  H01L29/49 ,  H01L29/51 ,  H01L29/78 ,  H01L27/22 ,  H01L27/24

摘要： A semiconductor device includes at least one trench extending into a semiconductor substrate and lined with a gate dielectric layer; a dipole inducing layer covering a lowermost portion of the lined trench; a gate electrode covering the dipole inducing layer and filled in the lined trench; and doping regions, in the semiconductor substrate, separated from each other by the lined trench and separated from the dipole inducing layer.

公开(公告)号：US09786598B2

公开(公告)日：2017-10-10

申请号：US14567756

申请日：2014-12-11

申请人： SK hynix Inc.

发明人： Eun-Jeong Kim ,  Jin-Yul Lee

IPC分类号： H01L27/108 ,  H01L23/528 ,  H01L21/764 ,  H01L23/532 ,  H01L23/535 ,  H01L23/522

CPC分类号： H01L23/528 ,  H01L21/764 ,  H01L23/5222 ,  H01L23/5329 ,  H01L23/535 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a first plug; a bit line which is in contact with the first plug and over the first plug and extended in one direction; a second plug including a first part adjacent to the bit line and a second part adjacent to the first plug; a double air gap which is disposed between the first part of the second plug and the bit line and includes a first air gap surrounding the first part of the second plug and a second air gap parallel to sidewalls of the bit line; and a capping layer suitable for capping the first and second air gaps.

公开(公告)号：US09865496B2

公开(公告)日：2018-01-09

申请号：US15236173

申请日：2016-08-12

申请人： SK hynix Inc.

发明人： Eun-Jeong Kim ,  Jin-Yul Lee ,  Han-Sang Song ,  Su-Ho Kim

IPC分类号： H01L21/762 ,  H01L21/02

CPC分类号： H01L21/76229 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02238 ,  H01L21/02362 ,  H01L21/76224

摘要： A method for manufacturing a semiconductor device includes forming a first trench and a second trench in a substrate, the first and the second trenches communicate with each other, the second trench may be formed wider than the first trench; forming a liner layer over an inner surface of the first trench and over an inner surface of the second the trench; forming a capping layer over the liner layer to form a merged overhang and a non-merged overhang, the merged overhang may be fill a top portion of the first trench, the non-merged overhang may be open a top portion of the second trench; and forming a gap-fill layer over the capping layer to fill a lower portion of the first trench and the second trench.

公开(公告)号：US10553692B2

公开(公告)日：2020-02-04

申请号：US15208395

申请日：2016-07-12

申请人： SK hynix Inc.

发明人： Dong-Soo Kim ,  Sung-Won Lim ,  Eun-Jeong Kim ,  Hyun-Jin Chang ,  Keun Heo ,  Jee-Hyun Kim

IPC分类号： H01L29/423 ,  H01L27/108 ,  H01L29/10 ,  H01L29/49 ,  H01L29/51 ,  H01L27/22 ,  H01L27/24 ,  H01L29/78

摘要： A semiconductor device includes at least one trench extending into a semiconductor substrate and lined with a gate dielectric layer; a dipole inducing layer covering a lowermost portion of the lined trench; a gate electrode covering the dipole inducing layer and filled in the lined trench; and doping regions, in the semiconductor substrate, separated from each other by the lined trench and separated from the dipole inducing layer.

公开(公告)号：US09634109B2

公开(公告)日：2017-04-25

申请号：US15337871

申请日：2016-10-28

申请人： SK hynix Inc.

发明人： Tae-Kyung Oh ,  Jin-Yul Lee ,  Eun-Jeong Kim ,  Dong-Soo Kim

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/51 ,  H01L29/49 ,  H01L21/28 ,  H01L27/108 ,  H01L27/24 ,  H01L27/22

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/228 ,  H01L27/2436 ,  H01L29/4236 ,  H01L29/513 ,  H01L29/66621 ,  H01L29/78 ,  H01L29/7827

摘要： A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.

公开(公告)号：US09508847B2

公开(公告)日：2016-11-29

申请号：US14739811

申请日：2015-06-15

申请人： SK hynix Inc.

发明人： Tae-Kyung Oh ,  Jin-Yul Lee ,  Eun-Jeong Kim ,  Dong-Soo Kim

IPC分类号： H01L29/78 ,  H01L29/423 ,  H01L29/51

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/228 ,  H01L27/2436 ,  H01L29/4236 ,  H01L29/513 ,  H01L29/66621 ,  H01L29/78 ,  H01L29/7827

摘要： A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.

摘要翻译： 一种半导体器件，包括其中形成沟槽的衬底，形成在衬底中的第一杂质区和第二杂质区，通过沟槽彼此分离，形成为填充沟槽的下部的栅电极和封盖 层形成在栅电极上以填充沟槽的上部。 所述栅电极包括形成在所述沟槽的下表面和所述沟槽的下部的侧壁上的第一功函数衬垫，而不与所述第一杂质区和所述第二杂质区重叠，并且包括含铝的金属氮化物; 以及在所述第一功函数衬垫上形成在所述沟槽下部的侧壁上的第二功函数衬垫，与所述第一杂质区和所述第二杂质区重叠，并且包括含硅非金属材料。

公开(公告)号：US10395973B2

公开(公告)日：2019-08-27

申请号：US16277774

申请日：2019-02-15

申请人： SK hynix Inc.

发明人： Eun-Jeong Kim ,  Jin-Yul Lee ,  Han-Sang Song ,  Su-Ho Kim

IPC分类号： H01L21/762 ,  H01L21/02

摘要： A method for manufacturing a semiconductor device includes forming a first trench and a second trench in a substrate, the first and the second trenches communicate with each other, the second trench may be formed wider than the first trench; forming a liner layer over an inner surface of the first trench and over an inner surface of the second the trench; forming a capping layer over the liner layer to form a merged overhang and a non-merged overhang, the merged overhang may be fill a top portion of the first trench, the non-merged overhang may be open a top portion of the second trench; and forming a gap-fill layer over the capping layer to fill a lower portion of the first trench and the second trench.

公开(公告)号：US10256136B2

公开(公告)日：2019-04-09

申请号：US15830878

申请日：2017-12-04

申请人： SK hynix Inc.

发明人： Eun-Jeong Kim ,  Jin-Yul Lee ,  Han-Sang Song ,  Su-Ho Kim

IPC分类号： H01L21/762 ,  H01L21/02

摘要： A method for manufacturing a semiconductor device includes forming a first trench and a second trench in a substrate, the first and the second trenches communicate with each other, the second trench may be formed wider than the first trench; forming a liner layer over an inner surface of the first trench and over an inner surface of the second the trench; forming a capping layer over the liner layer to form a merged overhang and a non-merged overhang, the merged overhang may be fill a top portion of the first trench, the non-merged overhang may be open a top portion of the second trench; and forming a gap-fill layer over the capping layer to fill a lower portion of the first trench and the second trench.