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公开(公告)号：US20220069813A1
公开(公告)日：2022-03-03
申请号：US17171719
申请日：2021-02-09
Applicant: SK hynix Inc.
Inventor： Sun Ki Cho , Dong Uc Ko , Yang Ho Sur , Jun Yong Song , Sung Gil Jang , Hae Kang Jung , Min Sung Cheon , Chang Kyu Choi , Tae Jin Hwang
Abstract: A buffer circuit configured to receive first and second input signals through first and second input transistors coupled to a first power voltage node, output a first output signal through a first output node and a second output signal through a second output node based on the first and second input signals. A load circuit is coupled among the first output node, the second output node, and a second power voltage node and a resistance value is adjusted based on at least one of the first and second output signals.
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公开(公告)号：US12288761B2
公开(公告)日：2025-04-29
申请号：US17572033
申请日：2022-01-10
Applicant: SK hynix Inc.
Inventor： Jun Yong Song , Kang Hun Kim , Si Yun Kim
Abstract: A semiconductor device includes a chip body; a passivation layer on the chip body; a lower dielectric layer on the passivation layer; a first re-distribution pad on the lower dielectric layer; an upper dielectric layer on the lower dielectric layer, the upper dielectric layer having a groove that exposes an upper surface of the first re-distribution pad; and a second re-distribution pad on the upper dielectric layer. An upper surface of the second re-distribution pad is positioned at a higher level than the upper surface of the first re-distribution pad.
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公开(公告)号：US10284396B2
公开(公告)日：2019-05-07
申请号：US15802922
申请日：2017-11-03
Applicant: SK hynix Inc.
Inventor： Jun Yong Song , Jeong Kyoum Kim , Hyung Soo Kim , Han Kyu Chi
IPC: H03H7/30 , H03H7/40 , H03K5/159 , H04L25/03 , H04W72/08 , H04B1/10 , H04B1/12 , H04B1/7097 , H04B7/08
Abstract: A symbol interference cancellation circuit may be provided. The symbol interference cancellation circuit may include an interference cancellation circuit configured for generating an interference-cancelled signal based on weight application signals, sampling output signals, and a clock signal.
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4.发明授权公开(公告)号：US09460775B1
公开(公告)日：2016-10-04
申请号：US14818093
申请日：2015-08-04
Applicant: SK hynix Inc.
Inventor： Jun Yong Song , Jong Ho Son
IPC: G11C7/00 , G11C11/4091 , G11C11/4074 , G11C11/4076 , G11C11/4094
CPC classification number: G11C11/4091 , G11C11/4074 , G11C11/4076 , G11C11/4094
Abstract: A sense amplifier driving device may include a sense amplifier driving block configured to supply a post overdriving voltage to a pull-up power line coupled to a sense amplifier, the post overdriving voltage supplied to the sense amplifier during a post overdriving operation period in correspondence to a pull-up driving signal. The sense amplifier driving device may include a driving signal generation block configured to compare a reference voltage, set by a voltage trimming signal, with a level of a power supply voltage, and generate the pull-up driving signal for controlling whether to perform a post overdriving operation.
Abstract translation: 感测放大器驱动装置可以包括读出放大器驱动块，其构造成将后过驱动电压提供给耦合到读出放大器的上拉电源线，后过驱动电压在后驱动操作周期期间提供给读出放大器，对应于 上拉驱动信号。 读出放大器驱动装置可以包括：驱动信号生成块，被配置为将通过电压调整信号设置的参考电压与电源电压的电平进行比较，并且生成用于控制是否执行一个信号的上拉驱动信号 过驱动。
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公开(公告)号：US12002783B2
公开(公告)日：2024-06-04
申请号：US17548205
申请日：2021-12-10
Applicant: SK hynix Inc.
Inventor： Jun Yong Song , Kang Hun Kim , Si Yun Kim
IPC: H01L23/00
CPC classification number: H01L24/81 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05555 , H01L2224/10175 , H01L2224/11013 , H01L2224/1146 , H01L2224/13018 , H01L2224/13019 , H01L2224/13076 , H01L2224/13147 , H01L2224/16135 , H01L2224/16268 , H01L2224/81385 , H01L2224/81815 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/014
Abstract: Provided is a method of manufacturing a semiconductor device including a bump interconnect structure. In the method of manufacturing the semiconductor device, a first substrate including a connection pad is formed, and a bump including a solder layer and a metal post protruding from the solder layer are formed on the connection pad. A second substrate including a bump land may be formed. The first substrate may be disposed on the second substrate so that a protruding end of the metal post contacts the bump land, and the solder layer may be reflowed. Accordingly, it possible to interconnect the metal post to the bump land.
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Patent Agency Ranking
公开(公告)号：US12237251B2
公开(公告)日：2025-02-25
申请号：US17715722
申请日：2022-04-07
Applicant: SK hynix Inc.
Inventor： Si Yun Kim , Kang Hun Kim , Jun Yong Song
IPC: H01L23/00 , H01L23/498
Abstract: A semiconductor package includes a package substrate, a connection pad including a recessed portion disposed on one surface of the package substrate, and an insulating pattern disposed on the one surface of the package substrate to be spaced apart from the connection pad. The connection pad includes an outer sidewall, an inner sidewall in the recessed portion inclining in an inward direction from an upper portion, and a groove pattern formed on the inner sidewall.
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公开(公告)号：US11735236B2
公开(公告)日：2023-08-22
申请号：US17942874
申请日：2022-09-12
Applicant: SK hynix Inc.
Inventor： Jun Yong Song
CPC classification number: G11C7/1051 , G11C5/147 , G11C7/1078 , G11C29/38
Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device compares a received signal with an original signal to generate a driving force control signal. The first semiconductor device also drives the original signal using a driving force in accordance with the driving force control signal to output an external transmission signal. The second semiconductor device receives the external transmission signal to generate a positive signal and a negative signal. The second semiconductor device also generates a restoration signal in response to the positive signal and the negative signal. The second semiconductor device additionally outputs the restoration signal as the external transmission signal to the first semiconductor device.
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公开(公告)号：US11443781B2
公开(公告)日：2022-09-13
申请号：US17199071
申请日：2021-03-11
Applicant: SK hynix Inc.
Inventor： Jun Yong Song
Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device compares a received signal with an original signal to generate a driving force control signal. The first semiconductor device also drives the original signal using a driving force in accordance with the driving force control signal to output an external transmission signal. The second semiconductor device receives the external transmission signal to generate a positive signal and a negative signal. The second semiconductor device also generates a restoration signal in response to the positive signal and the negative signal. The second semiconductor device additionally outputs the restoration signal as the external transmission signal to the first semiconductor device.
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公开(公告)号：US11271553B1
公开(公告)日：2022-03-08
申请号：US17171719
申请日：2021-02-09
Applicant: SK hynix Inc.
Inventor： Sun Ki Cho , Dong Uc Ko , Yang Ho Sur , Jun Yong Song , Sung Gil Jang , Hae Kang Jung , Min Sung Cheon , Chang Kyu Choi , Tae Jin Hwang
Abstract: A buffer circuit configured to receive first and second input signals through first and second input transistors coupled to a first power voltage node, output a first output signal through a first output node and a second output signal through a second output node based on the first and second input signals. A load circuit is coupled among the first output node, the second output node, and a second power voltage node and a resistance value is adjusted based on at least one of the first and second output signals.
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公开(公告)号：US10971198B2
公开(公告)日：2021-04-06
申请号：US16511841
申请日：2019-07-15
Applicant: SK hynix Inc.
Inventor： Jun Yong Song
Abstract: A semiconductor system may include a first semiconductor device and a second semiconductor device. The first semiconductor device compares a received signal with an original signal to generate a driving force control signal. The first semiconductor device also drives the original signal using a driving force in accordance with the driving force control signal to output an external transmission signal. The second semiconductor device receives the external transmission signal to generate a positive signal and a negative signal. The second semiconductor device also generates a restoration signal in response to the positive signal and the negative signal. The second semiconductor device additionally outputs the restoration signal as the external transmission signal to the first semiconductor device.
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