公开(公告)号：US20200379680A1

公开(公告)日：2020-12-03

申请号：US16677557

申请日：2019-11-07

Applicant: SK hynix Inc.

Inventor： Woongrae KIM ,  Woo Jin KANG ,  Seung Wook OH

IPC: G06F3/06 ,  G11C7/22 ,  G11C8/18

Abstract: A semiconductor device includes an internal clock generation circuit, a command generation circuit, and an address generation circuit. The internal clock generation circuit generates a command clock signal and an inverted command clock signal, wherein a cycle of the command clock signal and a cycle of the inverted command clock signal are determined by a mode. The command generation circuit generates a first command based on a first internal control signal and the command clock signal and generates a second command based on a second internal control signal and the inverted command clock signal. The address generation circuit generates a latch address based on the first internal control signal or a second internal control signal.

公开(公告)号：US20180294784A1

公开(公告)日：2018-10-11

申请号：US15668097

申请日：2017-08-03

Applicant: SK hynix Inc.

Inventor： Dong Hyun KIM ,  Eun Ji CHOI ,  Yo Han JEONG ,  Soon Ku KANG ,  Woo Jin KANG ,  Kwan Su SHON ,  Hyun Bae LEE ,  Tae Jin HWANG

IPC: H03F3/45 ,  G05F1/565

CPC classification number: H03F3/45076 ,  G05F1/565 ,  H03F3/45183 ,  H03F3/45488 ,  H03F3/4565 ,  H03F3/45748 ,  H03F2200/453 ,  H03F2203/45008 ,  H03F2203/45418 ,  H03M1/00

Abstract: An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.