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公开(公告)号：US20100172441A1
公开(公告)日：2010-07-08
申请号：US12225641
申请日：2007-03-13
申请人： Robert Alan Pitsch
发明人： Robert Alan Pitsch
CPC分类号： H04L27/16 , H03F1/3211 , H03F3/191 , H03F3/4508 , H03F3/45475 , H03F3/45488 , H03F3/50 , H03F2200/168 , H03F2200/451 , H03F2200/72 , H03F2203/5036 , H04H20/63 , H04H40/90
摘要： A system for processing signal communications between a frequency translation module and an integrated receiver decoder. According to an exemplary embodiment, the decoder and the frequency translation module comprise a signal processing apparatus comprising an input for receiving an frequency shift keyed modulated signal, an amplifier having negative feedback coupled to said input, wherein said input is further coupled to a first source of reference potential and a second source of reference potential; and a tank circuit coupled between said differential amplifier and an output. More particularly, the amplifier may comprise a first transistor having a first collector, a first emitter and a first base coupled to a signal source wherein said first base is further coupled to said first collector and a second transistor with a second base, a second emitter coupled to said first emitter, and a second collector, wherein said second collector is coupled to a bandpass filter and said bandpass filter is further coupled to an output.
摘要翻译： 一种用于处理频率转换模块和集成接收机解码器之间的信号通信的系统。 根据示例性实施例，解码器和频率转换模块包括信号处理设备，其包括用于接收频移键控调制信号的输入端，耦合到所述输入端的负反馈放大器，其中所述输入还耦合到第一源 的参考电位和第二个参考电位; 以及耦合在所述差分放大器和输出端之间的储能电路。 更具体地，放大器可以包括具有第一集电极，第一发射极和耦合到信号源的第一基极的第一晶体管，其中所述第一基极还耦合到所述第一集电极，第二晶体管具有第二基极，第二发射极 耦合到所述第一发射极和第二集电极，其中所述第二集电极耦合到带通滤波器，并且所述带通滤波器还耦合到输出端。
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公开(公告)号：US20190052239A1
公开(公告)日：2019-02-14
申请号：US16021042
申请日：2018-06-28
发明人： Motomitsu IWAMOTO
CPC分类号： H03F3/45246 , G05F1/56 , G11C5/147 , G11C7/062 , G11C29/026 , G11C29/028 , H03F3/45183 , H03F3/45192 , H03F3/45488 , H03F3/45753 , H03F2203/45342 , H03F2203/45398
摘要： A differential circuit including: a first MOS transistor and a second MOS transistor that constitute a differential pair; a determination unit to determine a level of a determination target signal that is based on at least one of differential inputs being input to gate of the first MOS transistor and a gate of the second MOS transistor; and a voltage changing unit to change a back gate voltage that is supplied to both back gates of the first MOS transistor and the second MOS transistor according to a determination result of the determination unit, and an OP-amp will be provided.
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公开(公告)号：US08737537B2
公开(公告)日：2014-05-27
申请号：US12225641
申请日：2007-03-13
申请人： Robert Alan Pitsch
发明人： Robert Alan Pitsch
CPC分类号： H04L27/16 , H03F1/3211 , H03F3/191 , H03F3/4508 , H03F3/45475 , H03F3/45488 , H03F3/50 , H03F2200/168 , H03F2200/451 , H03F2200/72 , H03F2203/5036 , H04H20/63 , H04H40/90
摘要： A system for processing signal communications between a frequency translation module and an integrated receiver decoder. According to an exemplary embodiment, the decoder and the frequency translation module comprise a signal processing apparatus comprising an input for receiving an frequency shift keyed modulated signal, an amplifier having negative feedback coupled to said input, wherein said input is further coupled to a first source of reference potential and a second source of reference potential; and a tank circuit coupled between said differential amplifier and an output. More particularly, the amplifier may comprise a first transistor having a first collector, a first emitter and a first base coupled to a signal source wherein said first base is further coupled to said first collector and a second transistor with a second base, a second emitter coupled to said first emitter, and a second collector, wherein said second collector is coupled to a bandpass filter and said bandpass filter is further coupled to an output.
摘要翻译： 一种用于处理频率转换模块和集成接收机解码器之间的信号通信的系统。 根据示例性实施例，解码器和频率转换模块包括信号处理设备，其包括用于接收频移键控调制信号的输入端，耦合到所述输入端的负反馈放大器，其中所述输入还耦合到第一源 的参考电位和第二个参考电位; 以及耦合在所述差分放大器和输出端之间的储能电路。 更具体地，放大器可以包括具有第一集电极，第一发射极和耦合到信号源的第一基极的第一晶体管，其中所述第一基极还耦合到所述第一集电极，第二晶体管具有第二基极，第二发射极 耦合到所述第一发射极和第二集电极，其中所述第二集电极耦合到带通滤波器，并且所述带通滤波器还耦合到输出端。
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公开(公告)号：US20170264252A1
公开(公告)日：2017-09-14
申请号：US15457431
申请日：2017-03-13
申请人： Chris J. Day , David Frank , Michael Glasbrener
发明人： Chris J. Day , David Frank , Michael Glasbrener
CPC分类号： H03F1/3211 , H03F1/34 , H03F1/42 , H03F3/19 , H03F3/195 , H03F3/245 , H03F3/26 , H03F3/4508 , H03F3/45278 , H03F3/45488 , H03F2200/09 , H03F2200/411 , H03F2200/451 , H03F2200/534 , H03F2200/541 , H03F2200/63 , H03F2203/45324 , H03F2203/45352 , H03F2203/45392 , H03F2203/45394 , H03F2203/45612
摘要： For broadband data communication, a data signal voltage at a signal input node can be converted to an output signal current at a signal output node. A first transistor device can contribute to the output signal current, with its transconductance or other gain reduced to accommodate larger signal swings, at which a second transistor can turn on and increase an effective resistance value of at least a portion of a gain degeneration resistor associated with the first transistor device. The second transistor can also contribute to the output signal current to help maintain or enhance an overall gain between the signal input node and the signal output node. Multiple secondary stages, push-pull arrangements, buffer amplifier configurations (which may or may not contribute to current in the gain degeneration resistor), input and output transformers, negative feedback to help reduce component variability, and frequency modification circuits or components are also described.
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公开(公告)号：US08476981B2
公开(公告)日：2013-07-02
申请号：US13315814
申请日：2011-12-09
申请人： Remi Corbiere , Bruno Louis , Vincent Petit
发明人： Remi Corbiere , Bruno Louis , Vincent Petit
IPC分类号： H03F3/04
CPC分类号： H03F3/45085 , H03F3/45488
摘要： A differential amplifier including an input of a balanced type relative to a reference potential; a balanced output; first and second bipolar transistors mounted in common emitter configuration, emitters of the first and second transistors linked by two feedback impedances in series; and a perfect current generator, wherein an impedance Zg at the terminals of the current generator is connected between a common point of the two feedback impedances and the reference potential, the input is connected to a base of the first transistor, a base of the second transistor is linked to the reference potential to form, with a base of the first transistor, the unbalanced input, the balanced output is produced by collectors of the first and second transistors through an impedance matching stage of the output, a correction feedback impedance Zcorr, wherein Zcorr=2·Zg, connects the collector of the second transistor and the base of the first transistor.
摘要翻译： 一种差分放大器，包括相对于参考电位的平衡型输入; 平衡输出; 安装在共发射极配置中的第一和第二双极晶体管，由串联的两个反馈阻抗连接的第一和第二晶体管的发射极; 和一个完美的电流发生器，其中电流发生器的端子处的阻抗Zg连接在两个反馈阻抗的公共点和参考电位之间，输入端连接到第一晶体管的基极，第二晶体管的基极 晶体管连接到参考电位，以与第一晶体管的基极形成不平衡输入，平衡输出由第一和第二晶体管的集电极通过输出的阻抗匹配级，校正反馈阻抗Zcorr， 其中Zcorr = 2·Zg，连接第二晶体管的集电极和第一晶体管的基极。
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公开(公告)号：US11804842B2
公开(公告)日：2023-10-31
申请号：US17846362
申请日：2022-06-22
发明人： Nicolas Borrel , Jimmy Fort , Mathieu Lisart
IPC分类号： H03K5/22 , H03K19/003 , H03F3/45 , H03K19/00 , H03K19/17736 , H03L7/097 , H04L9/32
CPC分类号： H03K19/00384 , H03F3/45273 , H03F3/45488 , H03K19/0027 , H03K19/17744 , H03L7/097 , H04L9/3278 , H04L2209/12
摘要： A physically unclonable function device includes a set of diode-connected MOS transistors having a random distribution of respective threshold voltages. A first circuit is configured to impose, on each first transistor, a fixed respective gate voltage regardless of the value of a current flowing in this first transistor. A second circuit is configured to impose, on each second transistor, a fixed respective gate voltage regardless of the value of a current flowing in this second transistor. A current mirror stage is coupled between the first circuit and the second circuit and is configured to deliver the reference current from a sum of the currents flowing in the first transistors. A comparator is configured to deliver a signal whose level depends on a comparison between a first current obtained from a reference current based on the first transistors and a second current of the second transistors.
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7.发明申请公开(公告)号：US20190020321A1
公开(公告)日：2019-01-17
申请号：US15648265
申请日：2017-07-12
发明人： Paul M Werking
IPC分类号： H03F3/45
CPC分类号： H03F3/45488 , H03F3/45475 , H03F3/45932 , H03F2203/45528
摘要： An embodiment of an amplifier circuit includes first, second, and third amplifiers. The first and second amplifiers are configured to amplify a differential input signal with a non-inverting gain. And the third amplifier, which can be a transconductance amplifier, is configured to cause the first and second amplifiers to amplify a common-mode input signal with a gain that is less than unity. The third amplifier can also be configured to cause the first and second amplifiers to generate a common-mode output voltage that is substantially independent of the common-mode input voltage. Consequently, in addition to presenting a high input impedance and a low noise factor, such an amplifier circuit has a configurable common-mode output voltage and has a lower common-mode gain (e.g., less than unity, approaching zero) than other non-inverting differential amplifiers.
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公开(公告)号：US20180294784A1
公开(公告)日：2018-10-11
申请号：US15668097
申请日：2017-08-03
申请人： SK hynix Inc.
发明人： Dong Hyun KIM , Eun Ji CHOI , Yo Han JEONG , Soon Ku KANG , Woo Jin KANG , Kwan Su SHON , Hyun Bae LEE , Tae Jin HWANG
CPC分类号： H03F3/45076 , G05F1/565 , H03F3/45183 , H03F3/45488 , H03F3/4565 , H03F3/45748 , H03F2200/453 , H03F2203/45008 , H03F2203/45418 , H03M1/00
摘要： An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.
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公开(公告)号：US20240348218A1
公开(公告)日：2024-10-17
申请号：US18301280
申请日：2023-04-17
申请人： Intel Corporation
发明人： Saurabh ANMADWAR
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F3/45488
摘要： An amplifier circuit, comprising an amplification stage, is configured to amplify an input signal, and to generate an output signal as the amplified input signal; a first feedback stage, configured to generate a first feedback voltage based on a voltage of the input signal, and to modify the output signal by the first feedback voltage; and a second feedback stage, configured to generate a second feedback voltage based on a current generated in response to the input signal, and to modify the output signal using the second feedback voltage.
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公开(公告)号：US11750160B1
公开(公告)日：2023-09-05
申请号：US17717063
申请日：2022-04-09
发明人： Chi Fung Lok
IPC分类号： H03F3/45
CPC分类号： H03F3/45125 , H03F3/45197 , H03F3/45488
摘要： A differential residue amplifier fits between Analog-to-Digital Converter (ADC) stages. Switched-Capacitor Common-Mode Feedback circuits determine voltage shifts. An AC-coupled input network uses switched capacitors to shift upward voltages of the differential inputs to the residue amplifier to apply to an upper pair of p-channel differential transistors with sources connected to the power supply. The AC-coupled input network also shifts downward in voltage the differential inputs to the residue amplifier to apply to a lower pair of n-channel differential transistors with grounded sources. The drains of the p-channel differential transistors connect to differential outputs through p-channel cascode transistors. N-channel cascode transistors connect the drains of the n-channel differential transistors to the differential outputs. The drains of differential transistors can be input to differential amplifiers to drive the gates of the cascode transistors for gain boosting. No tail current is used, allowing for wider output-voltage swings with low supply voltages.
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