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公开(公告)号:US20160118139A1
公开(公告)日:2016-04-28
申请号:US14586007
申请日:2014-12-30
Applicant: SK hynix Inc.
Inventor: Young Bo SHIM
CPC classification number: G11C17/18 , G11C17/16 , G11C29/04 , G11C29/76 , G11C29/78 , G11C2029/4402
Abstract: A semiconductor device may include a fuse controller and a fuse array. The fuse controller may be configured to generate internal address signals according to a level combination of repair data and may generate first and second voltage control signals in response to a rupture control signal that is enabled to rupture a predetermined fuse set for selecting a failed redundancy word line, in a test mode. The fuse array may include a plurality of fuse sets including the predetermined fuse set. Each of the plurality of fuse sets may be selected according to a level combination of the internal address signals, and the fuse array ruptures the predetermined fuse set for selecting the failed redundancy word line in response to the first and second voltage control signals to output fuse data.
Abstract translation: 半导体器件可以包括熔丝控制器和熔丝阵列。 熔丝控制器可以被配置为根据修复数据的电平组合产生内部地址信号,并且响应于能够破裂预定熔丝组以便选择故障冗余字的破裂控制信号而产生第一和第二电压控制信号 线,在测试模式。 熔丝阵列可以包括包括预定熔丝组的多个熔丝组。 可以根据内部地址信号的电平组合来选择多个熔丝组中的每一个,并且熔丝阵列响应于第一和第二电压控制信号破裂用于选择故障冗余字线的预定熔丝组以输出熔丝 数据。
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公开(公告)号:US20180102183A1
公开(公告)日:2018-04-12
申请号:US15605009
申请日:2017-05-25
Applicant: SK hynix Inc.
Inventor: Young Bo SHIM
CPC classification number: G11C29/38 , G11C29/36 , G11C29/44 , G11C2029/3602
Abstract: A semiconductor device includes a pattern data generation circuit generating pattern data, a data comparison circuit receiving read data which are outputted from cell arrays included in a core area by a read operation and comparing the read data with the pattern data to generate a fail code, and a fail flag generation circuit comparing the fail code with a set code to generate a fail flag.
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公开(公告)号:US20160372214A1
公开(公告)日:2016-12-22
申请号:US14878081
申请日:2015-10-08
Applicant: SK hynix Inc.
Inventor: Young Bo SHIM
CPC classification number: G11C29/78 , G11C17/16 , G11C17/18 , G11C29/4401 , G11C29/76 , G11C29/787 , G11C2029/4402
Abstract: A self repair device may include: an electrical fuse array configured to store bit information of a failed address in a fuse; an electrical fuse controller configured to store a row address or column address corresponding to a failed bit when a failure occurs, generate a repair address by comparing a failed address inputted during a test to the address stored therein, output a rupture enable signal for controlling a rupture operation of the electrical fuse array, and output row fuse set data or column fuse set data in response to the failed address; and a row/column redundancy unit configured to perform a row redundancy or column redundancy operation in response to the row fuse set data or the column fuse set data applied from the electrical fuse array.
Abstract translation: 自修复装置可以包括:电熔丝阵列,其被配置为在熔丝中存储故障地址的位信息; 电熔丝控制器,被配置为当发生故障时存储对应于故障位的行地址或列地址,通过将在测试期间输入的故障地址与存储在其中的地址进行比较来产生修复地址,输出用于控制 电熔丝阵列的断裂操作,以及输出行熔丝设置数据或列熔丝设置数据以响应故障地址; 以及行/列冗余单元,被配置为响应于从电熔丝阵列施加的行熔丝设置数据或列熔丝设置数据执行行冗余或列冗余操作。
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公开(公告)号:US20160351276A1
公开(公告)日:2016-12-01
申请号:US14874611
申请日:2015-10-05
Applicant: SK hynix Inc.
Inventor: Young Bo SHIM
Abstract: A smart self-repair device includes an ARE array configured to store information on respective bits of a fail address in fuses; a self-repair control block configured to store a row address and a column address corresponding to a fail bit when a fail occurs, analyze a fail mode by comparing the fail address inputted in a test and the stored addresses, and output fail address information and row fuse set information or column fuse set information according to the fail mode; a data control block configured to output repair information to the ARE array according to the fail address information and the row fuse set information or the column fuse set information; and a rupture control block configured to control a rupture operation of the ARE array.
Abstract translation: 智能自修复设备包括被配置为在熔丝中存储失败地址的相应位的信息的ARE阵列; 自修复控制块,被配置为在发生故障时存储对应于故障位的行地址和列地址,通过比较测试中输入的故障地址和存储的地址来分析故障模式,并输出故障地址信息和 列保险丝组信息或列保险丝组信息根据故障模式; 数据控制块,被配置为根据故障地址信息和行熔丝设置信息或列熔丝组信息将修复信息输出到ARE阵列; 以及破坏控制块,被配置为控制所述ARE阵列的断裂操作。
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公开(公告)号:US20150074494A1
公开(公告)日:2015-03-12
申请号:US14085134
申请日:2013-11-20
Applicant: SK hynix Inc.
Inventor: Young Bo SHIM
CPC classification number: G11C29/787 , G11C29/808
Abstract: A self-repair device includes an ARE (array rupture electrical fuse) array block configured to store fail addresses; an ARE control block configured to control a repair operation of fuse sets according to the fail addresses, compare a plurality of the fail addresses, and determine a failed state; and a redundancy block configured to store fuse data of the fail addresses, compare an input address with the fail addresses, and control row and column redundancy operations.
Abstract translation: 自修复装置包括被配置为存储失败地址的ARE(阵列断裂电熔丝)阵列块; ARE控制块,被配置为根据故障地址来控制熔丝组的修复操作,比较多个故障地址,并确定故障状态; 以及配置为存储故障地址的熔丝数据的冗余块,将输入地址与故障地址进行比较,以及控制行和列冗余操作。
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公开(公告)号:US20180166144A1
公开(公告)日:2018-06-14
申请号:US15656138
申请日:2017-07-21
Applicant: SK hynix Inc.
Inventor: Hyeong Soo JEONG , Tae Kyun SHIN , Young Bo SHIM
CPC classification number: G11C17/18 , G11C7/10 , G11C8/06 , G11C17/16 , G11C2029/4402
Abstract: A semiconductor device includes an internal command generation circuit suitable for generating a first internal command, a second internal command, and a third internal command based on a command/address signal. The semiconductor device also includes a driving signal generation circuit suitable for enabling a fuse driving signal for reading fuse data from a nonvolatile memory circuit, where the fuse signal is enabled while the second internal command is inputted a predetermined number of times. Further included is an output circuit suitable for outputting the fuse data in response to the third internal command.
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公开(公告)号:US20180059181A1
公开(公告)日:2018-03-01
申请号:US15471866
申请日:2017-03-28
Applicant: SK hynix Inc.
Inventor: Tae Kyun SHIN , Young Bo SHIM
IPC: G01R31/317 , G01R31/3177
CPC classification number: G01R31/31703 , G01R31/31701 , G01R31/31722 , G01R31/3177
Abstract: A semiconductor device may be provided. The semiconductor device may include a latch comparison circuit configured for generating a latched address by latching a pattern signal inputted through an address, and generate a comparison signal by comparing a pattern signal inputted through the address and the latched address. The semiconductor device may include a failure flag generation circuit configured for generating a failure flag signal based on the comparison signal.
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