公开(公告)号：US20220069718A1

公开(公告)日：2022-03-03

申请号：US17420866

申请日：2020-06-19

申请人： SOUTHEAST UNIVERSITY ,  CSMC TECHNOLOGIES FAB2 CO., LTD.

发明人： Shen XU ,  Minggang CHEN ,  Wanqing YANG ,  Dejin WANG ,  Rui JIANG ,  Weifeng SUN ,  Longxing SHI

IPC分类号： H02M3/335 ,  H02M1/38

摘要： Disclosed are a system and method for controlling an active clamp flyback (ACF) converter. The system includes: a drive module configured to control turning-on or turning-off of a main switching transistor SL and a clamp switching transistor SH; a main switching transistor voltage sampling circuit configured to sample a voltage drop between an input terminal and an output terminal of the main switching transistor SL; a first comparator connected to the main switching transistor voltage sampling circuit and configured to determine whether a sampled first sampling voltage is a positive voltage or a negative voltage; and a dead time calculation module configured to adjust, according to an output of the first comparator and a main switching transistor control signal DUTYL of a current cycle, a clamp switching transistor control signal DUTYH of next cycle outputted by the drive module.

公开(公告)号：US20200343810A1

公开(公告)日：2020-10-29

申请号：US16959015

申请日：2018-12-29

申请人： CSMC TECHNOLOGIES FAB2 CO., LTD. ,  SOUTHEAST UNIVERSITY

发明人： Shen XU ,  Minggang CHEN ,  Hao WANG ,  Jinyu XIAO ,  Wei SU ,  Weifeng SUN ,  Longxing SHI

IPC分类号： H02M1/38 ,  H02M3/335 ,  H02M1/08

摘要： An automatic dead zone time optimization system in a primary-side regulation flyback power supply CCM mode, comprising a closed loop formed by a control system, consisting of a single output DAC midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a PWM driving module, and a controlled synchronous rectification primary-side regulation flyback converter. By means of a DAC Sampling mechanism, a primary-side current is sampled to calculate a secondary-side average current, so as to obtain a primary-side average current Imid_p and a secondary-side average current Is(tmid) in the case of CCM; a secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time td; and finally, the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time td.