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公开(公告)号：US20220069718A1
公开(公告)日：2022-03-03
申请号：US17420866
申请日：2020-06-19
发明人： Shen XU , Minggang CHEN , Wanqing YANG , Dejin WANG , Rui JIANG , Weifeng SUN , Longxing SHI
摘要： Disclosed are a system and method for controlling an active clamp flyback (ACF) converter. The system includes: a drive module configured to control turning-on or turning-off of a main switching transistor SL and a clamp switching transistor SH; a main switching transistor voltage sampling circuit configured to sample a voltage drop between an input terminal and an output terminal of the main switching transistor SL; a first comparator connected to the main switching transistor voltage sampling circuit and configured to determine whether a sampled first sampling voltage is a positive voltage or a negative voltage; and a dead time calculation module configured to adjust, according to an output of the first comparator and a main switching transistor control signal DUTYL of a current cycle, a clamp switching transistor control signal DUTYH of next cycle outputted by the drive module.
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公开(公告)号：US20220376094A1
公开(公告)日：2022-11-24
申请号：US17762212
申请日：2020-08-26
发明人： Long ZHANG , Jie MA , Yan GU , Sen ZHANG , Jing ZHU , Jinli GONG , Weifeng SUN , Longxing SHI
IPC分类号： H01L29/739 , H01L29/08 , H01L29/10 , H01L29/06
摘要： An insulated gate bipolar transistor, comprising an anode second conductivity-type region and an anode first conductivity-type region provided on a drift region; the anode first conductivity-type region comprises a first region and a second region, and the anode second conductivity-type region comprises a third region and a fourth region, the dopant concentration of the first region being less than that of the second region, the dopant concentration of the third region being less than that of the fourth region, the third region being provided between the fourth region and a body region, the first region being provided below the fourth region, and the second region being provided below the third region and located between the first region and the body region.
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公开(公告)号：US20200343810A1
公开(公告)日：2020-10-29
申请号：US16959015
申请日：2018-12-29
发明人： Shen XU , Minggang CHEN , Hao WANG , Jinyu XIAO , Wei SU , Weifeng SUN , Longxing SHI
摘要： An automatic dead zone time optimization system in a primary-side regulation flyback power supply CCM mode, comprising a closed loop formed by a control system, consisting of a single output DAC midpoint sampling module, a digital control module, a current detection module, a dead zone time calculation module and a PWM driving module, and a controlled synchronous rectification primary-side regulation flyback converter. By means of a DAC Sampling mechanism, a primary-side current is sampled to calculate a secondary-side average current, so as to obtain a primary-side average current Imid_p and a secondary-side average current Is(tmid) in the case of CCM; a secondary-side current is input into the dead zone time calculation module to obtain a reasonable dead zone time td; and finally, the PWM driving module is jointly controlled by a primary-side regulation loop and the obtained dead zone time td.
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4.发明申请公开(公告)号：US20200336070A1
公开(公告)日：2020-10-22
申请号：US16959001
申请日：2018-12-29
发明人： Weifeng SUN , Rongrong TAO , Hao WANG , Jinyu XIAO , Wei SU , Shen XU , Longxing SHI
摘要： A method for improving the conversion efficiency of a CCM mode of a flyback resonant switch power supply, comprising: presetting a threshold value Tset, calculating a time interval Ttap between adjacent zero points during a present conducting time, outputting a switch-off signal at zero points, and comparing the time interval Ttap with the preset threshold value Tset; when Ttap>Tset, he present switch-off time to be less than a switch-off time of a previous cycle, outputting a switch-on signal; when Ttap=0, controlling the present switch-off time to be greater than a switch-off time of the previous cycle, outputting a switch-on signal; and when 0
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公开(公告)号：US20200328689A1
公开(公告)日：2020-10-15
申请号：US16915524
申请日：2020-06-29
发明人： Shen XU , Wei WANG , Feng LIN , Boyong HE , Wei SU , Weifeng SUN , Longxing SHI
IPC分类号： H02M3/335 , G01R19/165 , H03K5/24
摘要： Provided is a dynamic control method that turns off a primary-side switching transistor when an output voltage exceeds an upper limit, and control the switching of a secondary-side synchronous rectification transistor with a fixed cycle and a fixed duty cycle. During the time that the synchronous rectification transistor is turned on, the energy of a load capacitor at the output end is extracted to the primary side, which causes the output voltage to drop rapidly and the overshoot voltage to decrease greatly.
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公开(公告)号：US20230019004A1
公开(公告)日：2023-01-19
申请号：US17762206
申请日：2020-09-25
发明人： Jiaxing WEI , Qichao WANG , Kui XIAO , Dejin WANG , Li LU , Ling YANG , Ran YE , Siyang LIU , Weifeng SUN , Longxing SHI
IPC分类号： H01L29/78
摘要： A lateral double-diffused metal oxide semiconductor field effect transistor (LDMOS), including: a trench gate including a lower part inside a trench and an upper part outside the trench, a length of the lower part in a width direction of a conducting channel being less than that of the upper part, and the lower part extending into a body region and having a depth less than that of the body region; an insulation structure arranged between a drain region and the trench gate and extending downwards into a drift region, a depth of the insulation structure being less than that of the drift region.
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公开(公告)号：US20220069115A1
公开(公告)日：2022-03-03
申请号：US17417663
申请日：2019-12-19
发明人： Siyang LIU , Chi ZHANG , Kui XIAO , Guipeng SUN , Dejin WANG , Jiaxing WEI , Li LU , Weifeng SUN , Shengli LU
IPC分类号： H01L29/778 , H01L29/20 , H01L29/205 , H01L29/207
摘要： A heterojunction semiconductor device with a low on-resistance includes a metal drain electrode, a substrate, and a buffer layer. A current blocking layer arranged in the buffer layer, a gate structure is arranged on the buffer layer, and the gate structure comprises a metal gate electrode, GaN pillars and AlGaN layers, wherein a metal source electrode is arranged above the metal gate electrode; and the current blocking layer comprises multiple levels of current blocking layers, the centers of symmetry of the layers are collinear, and annular inner openings of the current blocking layers at all levels gradually become smaller from top to bottom. The AlGaN layers and the GaN pillars are distributed in a honeycomb above the buffer layer.
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公开(公告)号：US20220115532A1
公开(公告)日：2022-04-14
申请号：US17417677
申请日：2019-12-23
发明人： Weifeng SUN , Rongcheng LOU , Kui XIAO , Feng LIN , Jiaxing WEI , Sheng LI , Siyang LIU , Shengli LU , Longxing SHI
摘要： A power semiconductor device includes a substrate; drain metal; a drift region; a base region; a gate structure; a first conductive type doped region contacting the base region on the side of the base region distant from the gate structure; a source region provided in the base region and between the first conductive type doped region and the gate structure; contact metal that is provided on the first conductive type doped region and forms a contact barrier having rectifying characteristics together with the first conductive type doped region below; and source metal wrapping the contact metal and contacting the source region.
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公开(公告)号：US20220085727A1
公开(公告)日：2022-03-17
申请号：US17418606
申请日：2019-12-19
发明人： Weifeng SUN , Huaxin ZHANG , Hu ZHANG , Menglin YU , Siyu ZHAO , Shen XU , Longxing SHI
IPC分类号： H02M3/335
摘要： A flyback converter and an output voltage acquisition method therefor and apparatus thereof, wherein the output voltage acquisition method comprises the following steps: acquiring the reference output voltage of a flyback converter; sampling the current output voltage of the flyback converter within a reset time of each switching period among M continuous switching periods of the flyback converter, wherein M is a positive integer; and according to the reference output voltage and the current output voltage, sampling a dichotomy to successively approximate the current output voltage until the M switching periods are finished, and acquiring the output voltage of the flyback converter.
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10.发明申请公开(公告)号：US20200343845A1
公开(公告)日：2020-10-29
申请号：US16958868
申请日：2018-12-29
发明人： Rui ZHONG , Mingshu ZHANG , Sen ZHANG , Jinyu XIAO , Wei SU , Weifeng SUN , Longxing SHI
摘要： A method and an apparatus for reducing noise of a switched reluctance motor, includes: supplying a PWM signal as a driving signal to a driving circuit of a switched reluctance motor; and varying a carrier frequency of the PWM signal as an operation period of the switched reluctance motor varies; if the switched reluctance motor changes phase, determining that the operation period of the switched reluctance motor varies.
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