公开(公告)号：US20150075973A1

公开(公告)日：2015-03-19

申请号：US14483926

申请日：2014-09-11

Applicant: SPTS TECHNOLOGIES LIMITED

Inventor： ALEX THEODOSIOU ,  STEVE BURGESS

IPC: H01L21/02 ,  H01L21/67

Abstract: The invention relates to a method of pre-cleaning a semiconductor structure and to associated modular semiconductor process tools. The method includes the steps of: (i) providing a semiconductor structure having an exposed dielectric layer of an organic dielectric material, wherein the dielectric layer has one or more features formed therein which expose one or more electrically conductive structures to be pre-cleaned, in which the electrically conductive structures each include a metal layer, optionally with a barrier layer formed thereon, and the surface area of the exposed dielectric layer is greater than the surface area of the electrically conductive structures exposed by the dielectric layer; and (ii) pre-cleaning the semiconductor structure by performing an Ar/H2 sputter etch to remove material from the exposed electrically conductive structures and to remove organic dielectric material from the exposed dielectric layer.

Abstract translation: 本发明涉及一种预清洁半导体结构和相关的模块化半导体工艺工具的方法。 该方法包括以下步骤：（i）提供具有有机介电材料的暴露电介质层的半导体结构，其中介电层具有形成在其中的一个或多个特征，其暴露要预清洁的一个或多个导电结构， 其中导电结构各自包括金属层，任选地在其上形成阻挡层，并且暴露的电介质层的表面积大于由电介质层暴露的导电结构的表面积; 和（ii）通过执行Ar / H 2溅射蚀刻来预先清洁半导体结构，以从暴露的导电结构去除材料并从暴露的介电层去除有机电介质材料。

公开(公告)号：US20140008325A1

公开(公告)日：2014-01-09

申请号：US13934531

申请日：2013-07-03

Applicant: SPTS TECHNOLOGIES LIMITED

Inventor： STEPHEN R BURGESS ,  ALEX THEODOSIOU

IPC: H01J37/20

CPC classification number: H01J37/20 ,  H01J37/321 ,  H01J37/32862 ,  H01J2237/334

Abstract: A method is for etching successive substrates on a platen in an inductively coupled plasma chamber in which the etching process results in carbonaceous deposits in the chamber. The method includes (a) interrupting the etching processing of substrates, (b) running an oxygen or oxygen containing plasma within the chamber and removing gaseous by-products, and (c) resuming the etch processing of substrates. The method is characterised in that it further includes the step of running an argon plasma in the chamber after step (b) with the platen biased.

Abstract translation: 一种方法是用于在电感耦合等离子体室中的压板上蚀刻连续的衬底，其中蚀刻工艺导致腔室中的碳质沉积物。 该方法包括（a）中断衬底的蚀刻处理，（b）在室内运行含氧或含氧等离子体并除去气体副产物，以及（c）恢复衬底的蚀刻处理。 该方法的特征在于它还包括在步骤（b）之后在压板偏压的情况下在室中运行氩等离子体的步骤。