公开(公告)号：US20250087545A1

公开(公告)日：2025-03-13

申请号：US18462612

申请日：2023-09-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Kai Chong Chan ,  Linda Pei Ee Chua ,  Yung Kuan Hsiao ,  Beng Yee Teh’ ,  Jian Zuo ,  Yaojian Lin

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor device has a pre-molded discrete electrical component and a first encapsulant deposited over the pre-molded discrete electrical component. A first conductive layer is formed over the first encapsulant and pre-molded discrete electrical component. An electrical component is disposed over the first conductive layer. A second encapsulant is deposited over the electrical component and first conductive layer. A second conductive layer is formed over the second encapsulant. A conductive pillar is formed between the first conductive layer and second conductive layer through the second encapsulant. The pre-molded discrete electrical component has a discrete component and a third encapsulant deposited around the discrete component. The discrete component has an electrical terminal, a finish formed over the electrical terminal, and a third conductive layer formed over the finish. An interconnect structure formed on the electrical component is oriented toward the first conductive layer or the second conductive layer.