公开(公告)号：US20230260881A1

公开(公告)日：2023-08-17

申请号：US18163884

申请日：2023-02-03

Applicant: STATS ChipPAC Pte. Ltd

Inventor： HyunSeok PARK ,  SinJae KIM ,  YongMoo SHIN ,  DongJun SEO

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/16 ,  H01L21/60

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L25/16 ,  H01L21/60

Abstract: A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate including a first surface and a second surface opposite to the first surface; a first electronic component mounted on the first surface of the substrate; a conductive pillar formed on the first surface of the substrate, wherein a height of the conductive pillar is smaller than a height of the first electronic component; and a first encapsulant disposed on the first surface of the substrate and covering the first electronic component and the conductive pillar; forming a groove in the first encapsulant to expose a top surface and a portion of a lateral surface of the conductive pillar; and forming a bump in the groove, wherein the bump covers the top surface and the exposed portion of the lateral surface of the conductive pillar.

公开(公告)号：US20230268315A1

公开(公告)日：2023-08-24

申请号：US18165347

申请日：2023-02-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： JiSik MOON ,  DongJun SEO ,  JungSub LEE ,  KyoWang KOO

IPC: H01L23/00 ,  H01L21/683 ,  H01L21/78 ,  H01L23/552

CPC classification number: H01L24/94 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/552 ,  H01L2224/94

Abstract: The present application relates to a method for making semiconductor packages. The method for making semiconductor packages comprises forming a semiconductor package array, the semiconductor package array having at its first side a interconnect encasing layer; attaching an adhesive tape onto the interconnect encasing layer, wherein the adhesive layer has an adhesive layer and a base film; removing, by a laser beam, the base film of the adhesive tape at a predetermined ablation region; and singulating the semiconductor package array along the predetermined ablation regions to separate the semiconductor package array into a plurality of semiconductor packages.