公开(公告)号：US20200020650A1

公开(公告)日：2020-01-16

申请号：US16503876

申请日：2019-07-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Bruno Nicolas ,  Daniele Fronte

IPC: H01L23/00

Abstract: An electronic chip includes a first well having a first PN junction located therein, a second buried well located under and separated from the first well, and a first region forming a second PN junction with the second well. A detection circuit is coupled to the first well and configured to output a digital signal that has a first logic value when a potential difference within the first region is above a threshold and a second logic value when the potential difference within the first region is below the threshold.

公开(公告)号：US10998306B2

公开(公告)日：2021-05-04

申请号：US16100796

申请日：2018-08-10

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Daniele Fronte ,  Pierre-Yvan Liardet ,  Alexandre Sarafianos

IPC: H01L27/02 ,  G01R31/28 ,  H01L23/00

Abstract: A circuit for protecting an integrated circuit against fault injection attacks includes an element including a dielectric which is destroyed, resulting in the occurrence of a short-circuit. The element is connected between two terminals that receive a power supply voltage of the integrated circuit.

公开(公告)号：US11258579B2

公开(公告)日：2022-02-22

申请号：US16281887

申请日：2019-02-21

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Daniele Fronte ,  Yanis Linge ,  Thomas Ordas

IPC: H04L9/06 ,  H04L9/00 ,  G06F21/72 ,  G09C1/00

Abstract: A cryptographic circuit performs a substitution operation of a cryptographic algorithm based on a scrambled substitution table. For each set of one or more substitution operations of the cryptographic algorithm, the circuit performs a series of sets of one or more substitution operations of which: one is a real set of one or more substitution operations defined by the cryptographic algorithm, the real set of one or more substitution operations being based on input data modified by a real scrambling key; and one or more others are dummy sets of one or more substitution operations, each dummy set of one or more dummy substitution operations being based on input data modified by a different false scrambling key.

公开(公告)号：US11189578B2

公开(公告)日：2021-11-30

申请号：US16409704

申请日：2019-05-10

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Alexandre Sarafianos ,  Bruno Nicolas ,  Daniele Fronte

IPC: H01L23/528 ,  H01L23/00 ,  G01N27/04 ,  H01L23/522

Abstract: The disclosure concerns an electronic chip including a resistive region and a first switch of selection of a first area in contact with the resistive region.

公开(公告)号：US11270957B2

公开(公告)日：2022-03-08

申请号：US16267573

申请日：2019-02-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Bruno Nicolas ,  Daniele Fronte

IPC: H01L23/00 ,  G06F21/77 ,  G06F21/75 ,  G06K19/073

Abstract: A semiconductor substrate of an integrated circuit is protected by a coating. The semiconductor includes a front face and a rear face. To detect a breach of the integrity of a semiconductor substrate of an integrated circuit from the rear face, an opening of the coating facing the rear face of the substrate is detected. In response thereto, an alarm is generated. The detection is performed by making resistance measurements with respect to the semiconductor substrate and comparing the measured resistance to a nominal resistive value of the semiconductor substrate.

公开(公告)号：US20190051643A1

公开(公告)日：2019-02-14

申请号：US16100796

申请日：2018-08-10

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Daniele Fronte ,  Pierre-Yvan Liardet ,  Alexandre Sarafianos

IPC: H01L27/02 ,  H01L23/00 ,  G01R31/28

Abstract: A circuit for protecting an integrated circuit against fault injection attacks includes an element including a dielectric which is destroyed, resulting in the occurrence of a short-circuit. The element is connected between two terminals that receive a power supply voltage of the integrated circuit.

公开(公告)号：US11011479B2

公开(公告)日：2021-05-18

申请号：US16503876

申请日：2019-07-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Bruno Nicolas ,  Daniele Fronte

IPC: H01L23/00

Abstract: An electronic chip includes a first well having a first PN junction located therein, a second buried well located under and separated from the first well, and a first region forming a second PN junction with the second well. A detection circuit is coupled to the first well and configured to output a digital signal that has a first logic value when a potential difference within the first region is above a threshold and a second logic value when the potential difference within the first region is below the threshold.