公开(公告)号：US20190123737A1

公开(公告)日：2019-04-25

申请号：US16161533

申请日：2018-10-16

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jimmy FORT ,  Nicolas BORREL ,  Francesco LA ROSA

IPC: H03K17/22 ,  G01R19/165 ,  H03K5/24 ,  G05F3/26 ,  G06F1/28

Abstract: A power supply voltage is monitored by a monitoring circuit including a variable current generator and a band gap voltage generator core receiving the variable current and including a first node and a second node. A control circuit connected to the first and second nodes is configured to deliver a control signal on a first output node having a first state when an increasing power supply voltage is below a first threshold and having a second state when increasing power supply voltage exceeds the first threshold. The first threshold is at least equal to the band gap voltage. An equalization circuit also connected to the first and second nodes with feedback to the variable current generator generates the bandgap voltage at a second output node. The control signal operates to control actuation of the equalization circuit.

公开(公告)号：US20170097653A1

公开(公告)日：2017-04-06

申请号：US15150713

申请日：2016-05-10

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Nicolas DEMANGE ,  Jimmy FORT ,  Thierry SOUDE

IPC: G05F3/26 ,  H03B29/00 ,  H01L23/00

CPC classification number: G05F3/262 ,  G06F21/755 ,  G06K19/0723 ,  H01L23/576 ,  H03B29/00

Abstract: A method for smoothing current consumed by an electronic device is based on a series of current copying operations and on a current source delivering a reference current. The reference current is delivered in such a manner that current consumed as seen from the power supply depends on the reference current.

公开(公告)号：US20190354728A1

公开(公告)日：2019-11-21

申请号：US16411819

申请日：2019-05-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre SARAFIANOS ,  Thomas ORDAS ,  Yanis LINGE ,  Jimmy FORT

IPC: G06F21/75 ,  G06F17/50 ,  H04L9/00

Abstract: The supply voltage for a module of an integrated circuit managed to support protection against side channel attacks. Upon startup of the integrated circuit, one action from the following actions is selected in response to a command: supplying the module with the supply voltage having a fixed value that is selected from a plurality of predetermined values, or varying the value of the supply voltage in time with a pulsed signal.

公开(公告)号：US20190123736A1

公开(公告)日：2019-04-25

申请号：US16161531

申请日：2018-10-16

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Nicolas BORREL ,  Jimmy FORT ,  Francesco LA ROSA

IPC: H03K17/22 ,  H03L5/02

Abstract: A power supply voltage is monitored by a monitoring circuit including a band gap voltage generator core including a first node and a second node. A control circuit connected to the first and second nodes is configured to deliver a control signal on a first output node having a first state when an increasing power supply voltage is below a first threshold and having a second state when increasing power supply voltage exceeds the first threshold. The first threshold is at least equal to the band gap voltage. An equalization circuit also connected to the first and second nodes with feedback to the band gap voltage generator core generates the bandgap voltage at a second output node. The control signal operates to control actuation of the equalization circuit.

公开(公告)号：US20230152832A1

公开(公告)日：2023-05-18

申请号：US18052860

申请日：2022-11-04

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Jimmy FORT

IPC: G05F1/59 ,  G05F1/575 ,  G05F1/46

CPC classification number: G05F1/59 ,  G05F1/575 ,  G05F1/468

Abstract: Provided is a voltage regulator supplying a first voltage on a first output node and comprising a first input transistor of a non-inverting stage and a second biasing transistor of the non-inverting stage. The first and second transistors are coupled in series, in this order, between the first node and a second node of application of a second reference voltage. The second transistor is being configured to be controlled by a third voltage depending on the first voltage.

公开(公告)号：US20210124384A1

公开(公告)日：2021-04-29

申请号：US17070380

申请日：2020-10-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Jimmy FORT

IPC: G05F1/595

Abstract: A device includes a first transistor connected between a first node and an output terminal and a first current source connected between the first node and a supply rail. A circuit includes a second current source connected between the supply rail and a second node, an operational amplifier having a non-inverting input configured to receive a potential set point, and a second transistor connected between the second node and an inverting input of the operational amplifier. An output of the operational amplifier is connected to a control terminal of the second transistor and further connected to a control terminal of the first transistor.

公开(公告)号：US20180261560A1

公开(公告)日：2018-09-13

申请号：US15916183

申请日：2018-03-08

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Alexandre SARAFIANOS ,  Jimmy FORT ,  Thierry SOUDE

IPC: H01L23/00 ,  H01L21/66 ,  H01L29/36 ,  H01L21/74 ,  G01R31/26

Abstract: An electronic chip including a plurality of buried doped bars and a circuit for detecting an anomaly of an electric characteristic of the bars.