公开(公告)号：US11798937B2

公开(公告)日：2023-10-24

申请号：US17503621

申请日：2021-10-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Edoardo Brezza ,  Alexis Gauthier

IPC: H01L29/66 ,  H01L21/22 ,  H01L27/082 ,  H01L21/225 ,  H01L21/265 ,  H01L21/8222 ,  H01L29/737 ,  H01L29/732 ,  H01L29/08

CPC classification number: H01L27/0825 ,  H01L21/2205 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/8222 ,  H01L29/0821 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/737 ,  H01L29/7371

Abstract: A bipolar transistor includes a collector region having a first doped portion located in a substrate and a second doped portion covering and in contact with an area of the first doped portion. The collector region has a doping profile having a peak in the first portion and a decrease from this peak up to in the second portion.

公开(公告)号：US11710776B2

公开(公告)日：2023-07-25

申请号：US17401881

申请日：2021-08-13

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis Gauthier ,  Edoardo Brezza ,  Pascal Chevalier

IPC: H01L29/66 ,  H01L21/762 ,  H01L29/08 ,  H01L29/732

CPC classification number: H01L29/6625 ,  H01L21/76224 ,  H01L29/0804 ,  H01L29/7322

Abstract: A bipolar transistor includes a stack of an emitter, a base, and a collector. The base is structured to have a comb shape including fingers oriented in a plane orthogonal to a stacking direction of the stack.

公开(公告)号：US11417756B2

公开(公告)日：2022-08-16

申请号：US17175758

申请日：2021-02-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Edoardo Brezza ,  Alexis Gauthier ,  Fabien Deprat ,  Pascal Chevalier

IPC: H01L29/737 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

Abstract: A method of making a bipolar transistor includes forming a stack of a first, second, third and fourth insulating layers on a substrate. An opening is formed in the stack to reach the substrate. An epitaxial process forms the collector of the transistor on the substrate and selectively etches an annular opening in the third layer. The intrinsic part of the base is then formed by epitaxy on the collector, with the intrinsic part being separated from the third layer by the annular opening. The junction between the collector and the intrinsic part of the base is surrounded by the second layer. The emitter is formed on the intrinsic part and the third layer is removed. A selective deposition of a semiconductor layer on the second layer and in direct contact with the intrinsic part forms the extrinsic part of the base.