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公开(公告)号:US20180335526A1
公开(公告)日:2018-11-22
申请号:US15981321
申请日:2018-05-16
Applicant: STMicroelectronics (Crolles 2) SAS , Centre National De La Recherche Scientifique , UNIVERSITE D'AIX MARSEILLE , UNIVERSITE DE TOULON
Inventor: Martin COCHET , Dimitri SOUSSAN , Fady ABOUZEID , Gilles GASIOT , Philippe ROCHE
CPC classification number: G01T1/026
Abstract: Absorbed ionizing particles differentially effect first and second acquiring circuit stages configured to respectively generate first and second acquisition signals. Each acquisition signal has a characteristic that is variable as a function of an amount of absorbed ionizing particles. A measuring circuit generates, on the basis of the first and second acquisition signals, a relative parameter indicative of a relationship between the variable characteristics. A computation of a total ionizing dose is made using a 1st- or 2nd-degree polynomial relationship in the relative parameter.
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公开(公告)号:US20200252059A1
公开(公告)日:2020-08-06
申请号:US16747341
申请日:2020-01-20
Applicant: STMicroelectronics (Crolles 2) SAS , STMicroelectronics SA
Inventor: Capucine LECAT-MATHIEU DE BOISSAC , Fady ABOUZEID , Gilles GASIOT , Philippe ROCHE , Victor MALHERBE
Abstract: A first circuit includes a first chain of identical stages defining first and second delay lines. A second circuit includes a second chain of identical stages defining third and fourth delay lines. The stages of the second chain are identical to the stages of the first chain. A third circuit selectively couples one of the third delay line, the fourth delay line, or a first input of the third circuit to an input of the first circuit.
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公开(公告)号:US20230299009A1
公开(公告)日:2023-09-21
申请号:US18120555
申请日:2023-03-13
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Fady ABOUZEID , Philippe ROCHE
IPC: H01L23/538 , H01L21/768
CPC classification number: H01L23/5386 , H01L23/5385 , H01L21/76864
Abstract: An electronic device includes a first electronic chip, a second electronic chip, and an interconnection circuit. A first region of a first surface of the first electronic chip is assembled by hybrid bonding to a third region of a third surface of the interconnection circuit. A second region of a second surface of the second electronic chip is assembled by hybrid to a fourth region of the third surface of the interconnection circuit. In this configuration, the first electronic chip is electrically coupled to the second electronic chip through the interconnection circuit. The first surface of the first electronic chip further includes a fifth region which is not in contact with the interconnection circuit. This fifth region includes a connection pad electrically connected by a connection element to a connection substrate to which the interconnection circuit is mounted.
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公开(公告)号:US20210382189A1
公开(公告)日:2021-12-09
申请号:US17408679
申请日:2021-08-23
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Gilles GASIOT , Fady ABOUZEID
IPC: G01T1/24 , H01L27/07 , H01L31/103
Abstract: A diode and a transistor are connected in parallel. The transistor is located on a first doped region forming a PN junction of the diode with a second doped region located under the first region. The circuit functions as an ionizing radiation detection cell by generating a current through the PN junction which changes by a voltage generated across the transistor. This change in voltage is compared to a threshold to detect the ionizing radiation.
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公开(公告)号:US20200150292A1
公开(公告)日:2020-05-14
申请号:US16677005
申请日:2019-11-07
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Gilles GASIOT , Fady ABOUZEID
IPC: G01T1/24 , H01L27/07 , H01L31/103
Abstract: A diode and a transistor are connected in parallel. The transistor is located on a first doped region forming a PN junction of the diode with a second doped region located under the first region. The circuit functions as an ionizing radiation detection cell by generating a current through the PN junction which changes by a voltage generated across the transistor. This change in voltage is compared to a threshold to detect the ionizing radiation.
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公开(公告)号:US20200081476A1
公开(公告)日:2020-03-12
申请号:US16127771
申请日:2018-09-11
Applicant: STMICROELECTRONICS (CROLLES 2) SAS
Inventor: Guenole LALLEMENT , Fady ABOUZEID
IPC: G05F3/20 , H03K19/0948 , H03K19/00 , G06F17/50 , H01L27/092 , H01L29/78
Abstract: A digital circuit includes logic circuitry formed by logic gates. Each logic gate includes a p-channel MOSFET and an n-channel MOSFET. A body bias generator circuit applies an n-body bias voltage to the n-body bias nodes of the p-channel MOSFETs and applies a p-body bias voltage to the p-body bias nodes of the n-channel MOSFETs. The body bias generator circuit operates in: a first mode to apply a ground supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply a positive supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage; and a second mode to apply the positive supply voltage to the n-body bias nodes of the logic gates as the n-body bias voltage and apply the ground supply voltage to the p-body bias nodes of the logic gates as the p-body bias voltage.
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