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1.
公开(公告)号:US09812399B2
公开(公告)日:2017-11-07
申请号:US15137063
申请日:2016-04-25
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Pascal Fornara , Jean-Philippe Escales
IPC: H01L23/48 , H01L23/532 , H01L21/768 , H01L21/02 , H01L23/528 , H01L23/522
CPC classification number: H01L23/53295 , H01L21/02167 , H01L21/0217 , H01L21/76829 , H01L21/76831 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/53228
Abstract: A non-porous dielectric barrier is provided between a porous portion of a dielectric region and an electrically conductive element of an interconnect portion of an integrated circuit. This non-porous dielectric barrier protects the integrated circuit from breakdown of the least one dielectric region caused by electrical conduction assisted by the presence of defects located in the at least one dielectric region.
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公开(公告)号:US10796992B2
公开(公告)日:2020-10-06
申请号:US16260394
申请日:2019-01-29
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Jean-Philippe Escales
IPC: H01L23/528 , H01L23/532 , H01L21/768 , H01L21/311 , H01L23/31
Abstract: A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric region, at least in part porous, separating two electrically conducting elements of the interconnection part of the integrated circuit. Such a breakdown may occur due to electrical conduction assisted by the presence of defects within the at least one dielectric region.
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3.
公开(公告)号:US10600737B2
公开(公告)日:2020-03-24
申请号:US15722703
申请日:2017-10-02
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Pascal Fornara , Jean-Philippe Escales
IPC: H01L21/31 , H01L23/532 , H01L21/768 , H01L21/02 , H01L23/522 , H01L23/528
Abstract: A non-porous dielectric barrier is provided between a porous portion of a dielectric region and an electrically conductive element of an interconnect portion of an integrated circuit. This non-porous dielectric barrier protects the integrated circuit from breakdown of the least one dielectric region caused by electrical conduction assisted by the presence of defects located in the at least one dielectric region.
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公开(公告)号:US10229880B2
公开(公告)日:2019-03-12
申请号:US15379146
申请日:2016-12-14
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Jean-Philippe Escales
IPC: H01L21/768 , H01L23/48 , H01L23/532 , H01L23/528 , H01L21/311 , H01L23/31
Abstract: A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric region, at least in part porous, separating two electrically conducting elements of the interconnection part of the integrated circuit. Such a breakdown may occur due to electrical conduction assisted by the presence of defects within the at least one dielectric region.
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5.
公开(公告)号:US20180025990A1
公开(公告)日:2018-01-25
申请号:US15722703
申请日:2017-10-02
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Pascal Fornara , Jean-Philippe Escales
IPC: H01L23/532 , H01L23/522 , H01L23/528 , H01L21/768
CPC classification number: H01L23/53295 , H01L21/02167 , H01L21/0217 , H01L21/76829 , H01L21/76831 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/53228
Abstract: A non-porous dielectric barrier is provided between a porous portion of a dielectric region and an electrically conductive element of an interconnect portion of an integrated circuit. This non-porous dielectric barrier protects the integrated circuit from breakdown of the least one dielectric region caused by electrical conduction assisted by the presence of defects located in the at least one dielectric region.
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6.
公开(公告)号:US20170301623A1
公开(公告)日:2017-10-19
申请号:US15379146
申请日:2016-12-14
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Jean-Philippe Escales
IPC: H01L23/528 , H01L21/768 , H01L21/311 , H01L23/532 , H01L23/31
CPC classification number: H01L23/5283 , H01L21/31111 , H01L21/76831 , H01L21/76832 , H01L21/76892 , H01L23/3114 , H01L23/3171 , H01L23/528 , H01L23/53295
Abstract: A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric region, at least in part porous, separating two electrically conducting elements of the interconnection part of the integrated circuit. Such a breakdown may occur due to electrical conduction assisted by the presence of defects within the at least one dielectric region.
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7.
公开(公告)号:US20170098615A1
公开(公告)日:2017-04-06
申请号:US15137063
申请日:2016-04-25
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Pascal Fornara , Jean-Philippe Escales
IPC: H01L23/532 , H01L23/522 , H01L23/528 , H01L21/768 , H01L21/02
CPC classification number: H01L23/53295 , H01L21/02167 , H01L21/0217 , H01L21/76829 , H01L21/76831 , H01L21/76877 , H01L23/5226 , H01L23/528 , H01L23/53228
Abstract: A non-porous dielectric barrier is provided between a porous portion of a dielectric region and an electrically conductive element of an interconnect portion of an integrated circuit. This non-porous dielectric barrier protects the integrated circuit from breakdown of the least one dielectric region caused by electrical conduction assisted by the presence of defects located in the at least one dielectric region.
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