公开(公告)号：US09946282B2

公开(公告)日：2018-04-17

申请号：US15244289

申请日：2016-08-23

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F1/00 ,  G05F1/575 ,  G05F1/565 ,  G05F1/59 ,  G05F3/30

CPC classification number: G05F1/575 ,  G05F1/565 ,  G05F1/59 ,  G05F3/30

Abstract: A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.

公开(公告)号：US10073484B2

公开(公告)日：2018-09-11

申请号：US15671657

申请日：2017-08-08

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267

Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

公开(公告)号：US20170102727A1

公开(公告)日：2017-04-13

申请号：US14887739

申请日：2015-10-20

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267

Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

公开(公告)号：US09760108B2

公开(公告)日：2017-09-12

申请号：US14887739

申请日：2015-10-20

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267

Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

公开(公告)号：US20150185747A1

公开(公告)日：2015-07-02

申请号：US14543294

申请日：2014-11-17

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F1/565 ,  G05F1/59 ,  G05F1/575

CPC classification number: G05F1/575 ,  G05F1/565 ,  G05F1/59 ,  G05F3/30

Abstract: A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.

Abstract translation: 电压调节器包括反馈调节环路和驱动晶体管，其被配置为将电流输出到调节输出端。 瞬态恢复电路耦合到电压调节器电路，并且包括耦合到源极电流到驱动晶体管的控制端的第一晶体管，其中源电流除了响应于反馈调节环的操作而产生的电流之外。 第一晶体管响应于调节输出处的电压下降而选择性地致动。 瞬态恢复电路还包括耦合到从调节输出吸收电流的第二晶体管。 灌电流在调节器电路的静态工作模式下具有第一个非零幅值。 响应于调节输出处的电压增加，第二晶体管的操作被修改以将吸收电流增加到第二，更大，非零的幅度。

公开(公告)号：US09436206B2

公开(公告)日：2016-09-06

申请号：US14519225

申请日：2014-10-21

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/20 ,  G05F3/26 ,  G05F1/46 ,  G05F3/24

CPC classification number: G05F3/267 ,  G05F1/463 ,  G05F3/242

Abstract: A reference current path carries a reference current. A first transistor is coupled to the reference current path. A second transistor is also coupled to the reference current path. The first and second transistors are connected in parallel to carry the reference current. The first transistor is biased by a first voltage (which is a bandgap voltage plus a threshold voltage). The second transistor is biased by a second voltage (which is a PTAT voltage plus a threshold voltage). The first and second transistors are thus biased by voltages having different and opposite temperature coefficients with a result that the temperature coefficients of the currents flowing in the first and second transistors are opposite and the reference current accordingly has a low temperature coefficient.

Abstract translation: 参考电流路径携带参考电流。 第一晶体管耦合到参考电流路径。 第二晶体管也耦合到参考电流路径。 第一和第二晶体管并联连接以承载参考电流。 第一晶体管被第一电压（其是带隙电压加上阈值电压）偏置。 第二晶体管被第二电压（其为PTAT电压加上阈值电压）偏置。 因此，第一和第二晶体管被具有不同和相反的温度系数的电压偏置，结果是在第一和第二晶体管中流动的电流的温度系数相反，并且参考电流相应地具有低的温度系数。

公开(公告)号：US20150185754A1

公开(公告)日：2015-07-02

申请号：US14519225

申请日：2014-10-21

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267 ,  G05F1/463 ,  G05F3/242

Abstract: A reference current path carries a reference current. A first transistor is coupled to the reference current path. A second transistor is also coupled to the reference current path. The first and second transistors are connected in parallel to carry the reference current. The first transistor is biased by a first voltage (which is a bandgap voltage plus a threshold voltage). The second transistor is biased by a second voltage (which is a PTAT voltage plus a threshold voltage). The first and second transistors are thus biased by voltages having different and opposite temperature coefficients with a result that the temperature coefficients of the currents flowing in the first and second transistors are opposite and the reference current accordingly has a low temperature coefficient.

Abstract translation: 参考电流路径携带参考电流。 第一晶体管耦合到参考电流路径。 第二晶体管也耦合到参考电流路径。 第一和第二晶体管并联连接以承载参考电流。 第一晶体管被第一电压（其是带隙电压加上阈值电压）偏置。 第二晶体管被第二电压（其为PTAT电压加上阈值电压）偏置。 因此，第一和第二晶体管被具有不同和相反的温度系数的电压偏置，结果是在第一和第二晶体管中流动的电流的温度系数相反，并且参考电流相应地具有低的温度系数。

公开(公告)号：US20170336822A1

公开(公告)日：2017-11-23

申请号：US15671657

申请日：2017-08-08

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267

Abstract: A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

公开(公告)号：US09531355B1

公开(公告)日：2016-12-27

申请号：US14754778

申请日：2015-06-30

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: H03K4/06 ,  H03K4/502 ,  H03K5/00 ,  H03K3/017

CPC classification number: H03K5/00 ,  H03K5/135 ,  H03K2005/00202

Abstract: An electronic device includes a first circuit to generate an output control signal when a first voltage across a first capacitor receiving an input current exceeds a threshold voltage, in response to an input signal having a first logic level. The input current is proportional to a frequency of the input signal. A second circuit is to generate an output reset signal when a second voltage across a second capacitor receiving the input current exceeds the threshold voltage, in response to the input signal having a second logic level. A flip flop is to generate a signal output as having the first logic level in response to the output control signal, and to reset and generate the signal output as having the second logic level in response to the output reset signal.

Abstract translation: 电子设备包括第一电路，用于响应于具有第一逻辑电平的输入信号，当接收输入电流的第一电容器两端的第一电压超过阈值电压时产生输出控制信号。 输入电流与输入信号的频率成比例。 第二电路是响应于输入信号具有第二逻辑电平而在接收输入电流的第二电容器两端的第二电压超过阈值电压时产生输出复位信号。 触发器是响应于输出控制信号而产生具有第一逻辑电平的信号输出，并且响应于输出复位信号复位并产生具有第二逻辑电平的信号输出。

公开(公告)号：US20160373093A1

公开(公告)日：2016-12-22

申请号：US14754778

申请日：2015-06-30

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: H03K4/502 ,  H03K3/017 ,  H03K5/00

CPC classification number: H03K5/00 ,  H03K5/135 ,  H03K2005/00202

Abstract: An electronic device includes a first circuit to generate an output control signal when a first voltage across a first capacitor receiving an input current exceeds a threshold voltage, in response to an input signal having a first logic level. The input current is proportional to a frequency of the input signal. A second circuit is to generate an output reset signal when a second voltage across a second capacitor receiving the input current exceeds the threshold voltage, in response to the input signal having a second logic level. A flip flop is to generate a signal output as having the first logic level in response to the output control signal, and to reset and generate the signal output as having the second logic level in response to the output reset signal.

Abstract translation: 电子设备包括第一电路，用于响应于具有第一逻辑电平的输入信号，当接收输入电流的第一电容器两端的第一电压超过阈值电压时产生输出控制信号。 输入电流与输入信号的频率成比例。 第二电路是响应于输入信号具有第二逻辑电平而在接收输入电流的第二电容器两端的第二电压超过阈值电压时产生输出复位信号。 触发器是响应于输出控制信号而产生具有第一逻辑电平的信号输出，并且响应于输出复位信号复位并产生具有第二逻辑电平的信号输出。