公开(公告)号：US20200321330A1

公开(公告)日：2020-10-08

申请号：US16834329

申请日：2020-03-30

Applicant: STMicroelectronics (Tours) SAS

Inventor： Eric LACONDE ,  Olivier ORY

IPC: H01L27/02 ,  H01L29/87 ,  H01L29/866

Abstract: A semiconductor substrate of a first conductivity type is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is formed an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are provided in the semiconductor layer. A second region of the second conductivity type is formed in the first well. A third region of the second conductivity type is formed in the second well. The first well, the semiconducting layer, the second well and the third region form a first lateral thyristor. The second well, the semiconductor layer, the first well and the second region form a second lateral thyristor. The buried region and semiconductor substrate form a zener diode which sets the trigger voltage for the lateral thyristors.

公开(公告)号：US20190019687A1

公开(公告)日：2019-01-17

申请号：US16033334

申请日：2018-07-12

Applicant: STMicroelectronics (Tours) SAS

Inventor： Mathieu ROUVIERE ,  Mohamed BOUFNICHEL ,  Eric LACONDE

IPC: H01L21/3065 ,  H01L21/308 ,  H01L21/3105

Abstract: Laterally insulated integrated circuit chips are fabricated from a semiconductor wafer. Peripheral trenches are formed in the wafer which laterally delimit integrated circuit chips to be formed. A depth of the peripheral trenches is greater than or equal to a desired final thickness of the integrated circuit chips. The peripheral trenches are formed by a process which repeats successive steps of a) ion etching using a sulfur hexafluoride plasma, and b) passivating using an octafluorocyclobutane plasma. Upon completion of the step of forming the peripheral trenches, lateral walls of the peripheral trenches are covered by an insulating layer of a polyfluoroethene. A thinning step is performed on the lower surface of the wafer until a bottom of the peripheral trenches is reached. The insulating layer is not removed.

公开(公告)号：US20200321329A1

公开(公告)日：2020-10-08

申请号：US16834499

申请日：2020-03-30

Applicant: STMicroelectronics (Tours) SAS

Inventor： Eric LACONDE ,  Olivier ORY

IPC: H01L27/02 ,  H01L27/08

Abstract: A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.