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    PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD
    2.
    发明公开
    PROCESSING SYSTEM, RELATED INTEGRATED CIRCUIT, DEVICE AND METHOD 审中-公开

    公开(公告)号：US20240160598A1

    公开(公告)日：2024-05-16

    申请号：US18503744

    申请日：2023-11-07

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Application GMBH

    Inventor： Mirko Dondini ,  Calogero Andrea Trecarichi ,  Fred Rennig

    IPC: G06F13/42

    CPC classification number: G06F13/4282 ,  G06F2213/40

    Abstract: An example processing system includes a processing circuit, a volatile memory and a CAN communication controller circuit. The CAN communication controller circuit includes configuration and status registers. A transmission handler circuit and a reception handler circuit transmits and receives data via the CAN core circuit by exchanging data with the volatile memory based on the configuration data stored to the configuration and status registers, and filter elements stored to the volatile memory. Specifically, the processing system further includes a hardware host circuit comprising a non-volatile memory configured to store first configuration data (CD1) and second configuration data (CD2). The CD1 includes configuration data to be transferred to the configuration and status registers of the CAN communication controller circuit and the CD2 includes at least one filter element to be transferred to the volatile memory. A control circuit manages an initialization mode, a reception mode and a transmission mode. During the initialization mode, the hardware host circuit stores the CD1 to the configuration and status registers and the CD2 to the volatile memory.

    SYSTEM AND METHOD FOR COMMUNICATION BETWEEN A MASTER DEVICE AND A SLAVE DEVICE
    6.
    发明申请
    SYSTEM AND METHOD FOR COMMUNICATION BETWEEN A MASTER DEVICE AND A SLAVE DEVICE 有权

    公开(公告)号：US20220318173A1

    公开(公告)日：2022-10-06

    申请号：US17806587

    申请日：2022-06-13

    Applicant: STMicroelectronics Design & Application S.R.O. ,  STMicroelectronics Application GMBH

    Inventor： Fred Rennig ,  Ludek Beran

    IPC: G06F13/362 ,  G06F13/40 ,  G06F11/07 ,  H04L12/403 ,  G05B19/042

    Abstract: A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.

    System and method for communication between a master device and a slave device
    7.
    发明授权
    System and method for communication between a master device and a slave device 有权

    公开(公告)号：US10678726B2

    公开(公告)日：2020-06-09

    申请号：US16360229

    申请日：2019-03-21

    Applicant: STMicroelectronics Design and Application S.R.O. ,  STMicroelectronics Application GmbH

    Inventor： Fred Rennig ,  Ludek Beran

    IPC: G06F13/362 ,  G06F13/40 ,  G06F11/07 ,  H04L12/403 ,  G05B19/042 ,  H03M13/09

    Abstract: A device includes a master device, a set of slave devices and a bus. The master device is configured to transmit first messages carrying a set of operation data message portions indicative of operations for implementation by slave devices of the set of slave devices, and second messages addressed to slave devices in the set of slave devices. The second messages convey identifiers identifying respective ones of the slave devices to which the second messages are addressed requesting respective reactions towards the master device within respective expected reaction intervals. The slave devices are configured to receive the first messages transmitted from the master device, read respective operation data message portions in the set of operation data message portions, implement respective operations as a function of the respective operation data message portions read, and receive the second messages transmitted from the master device.

    Microcontroller and corresponding method of operation
    8.
    发明授权
    Microcontroller and corresponding method of operation 有权

    公开(公告)号：US12259844B2

    公开(公告)日：2025-03-25

    申请号：US17829902

    申请日：2022-06-01

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics Application GMBH

    Inventor： Giuseppe Cavallaro ,  Fred Rennig

    IPC: G06F13/42 ,  G05B19/042 ,  G06F11/10 ,  G06F13/38 ,  G06F13/40

    Abstract: In an embodiment a microcontroller includes a processing unit and a deserial-serial peripheral interface (DSPI) module, wherein the deserial-serial peripheral interface module is coupleable to a communication bus configured to operate according to a selected communication protocol, wherein the processing unit is configured to read user data intended for inclusion in an outgoing frame encoded according to the selected communication protocol, calculate, as a function of the user data, a cyclic redundancy check (CRC) value intended for inclusion in the outgoing frame, compose the outgoing frame by including the user data and the calculated CRC value into the outgoing frame, produce a DSPI frame encoded according to the selected communication protocol as a function of the outgoing frame and program a data register of the deserial-serial peripheral interface module with the DSPI frame, and wherein the deserial-serial peripheral interface module is configured to transmit the DSPI frame via the communication bus.

    Device and method for checking frames from a communication bus
    10.
    发明授权
    Device and method for checking frames from a communication bus 有权

    公开(公告)号：US11677648B2

    公开(公告)日：2023-06-13

    申请号：US17182914

    申请日：2021-02-23

    Applicant: STMicroelectronics Application GMBH

    Inventor： Fred Rennig

    IPC: H04L43/08 ,  H04L12/40

    CPC classification number: H04L43/08 ,  H04L12/40 ,  H04L2012/40215

    Abstract: In accordance with an embodiment, a method includes determining whether a frame received from a communication bus is encoded according to a particular communication protocol and is addressed to a particular electronic device; increasing a frame count value when the frame is encoded according to the particular communication protocol and is addressed to the particular electronic device based on the determination, wherein increasing the frame count value comprises increasing a count of a modular arithmetic counter circuit having a first bit depth, and the frame count value is constrained to a modulus value of the modular arithmetic counter circuit; setting a frame count status bit based on comparing the frame count value to threshold values, and transmitting a frame comprising the frame counter status bit over the communication bus, and resetting the frame count value at an end of a monitoring time interval.

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