PVT COMPENSATED SLOW TRANSITION SERIAL INTERFACE IO TRANSMITTER WITH REDUCED DELAY

    公开(公告)号:US20250117350A1

    公开(公告)日:2025-04-10

    申请号:US18788862

    申请日:2024-07-30

    Abstract: Systems, apparatuses, and methods for serial peripheral interfaces are provided, particularly for PVT compensated serial peripheral interfaces with slow transition serial interface IO transmitter with reduced delay. The serial peripheral interfaces may include driver circuitry, pre-driver circuitry, PVT compensated current sink circuitry, and PVT compensated current source circuit. The PVT compensated current sink circuitry and PVT compensated current source circuit may generate and transmit signals compensating for PVT to the pre-driver circuitry, which may generate and transmit signals controlling IO data signals generated by the driver circuitry. The IO data signals generated may be compensated for process, voltage, and temperature. The compensation may provide IO data signals with slower transition times and with reduced delays.

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