公开(公告)号：US20240128971A1

公开(公告)日：2024-04-18

申请号：US18481907

申请日：2023-10-05

Applicant: STMicroelectronics International N.V.

Inventor： Sameer VASHISHTHA ,  Saiyid Mohammad Irshad RIZVI ,  Paras GARG

IPC: H03K17/56

CPC classification number: H03K17/56 ,  H03K2005/00078

Abstract: An integrated circuit includes a current mode transmitter having a first driver and a second driver. The first driver receives a single bit data stream. The second driver receives a delayed data stream corresponding to the single bit data stream delayed by a clock cycle. The current mode transmitter has a transition detector that generates a bulk modulation signal having a first value when the single bit data stream is the same as the delayed data stream and having a second value when the single bit data stream is different from the delayed data stream. The transition detector supplies the bulk modulation signal to the bulk terminals of driver switches of the first and second drivers.

公开(公告)号：US20240113741A1

公开(公告)日：2024-04-04

申请号：US18471162

申请日：2023-09-20

Applicant: STMicroelectronics International N.V.

Inventor： Sameer VASHISHTHA ,  Kirtiman Singh RATHORE ,  Paras GARG

IPC: H04B1/44 ,  H03K19/00 ,  H04B17/11

CPC classification number: H04B1/44 ,  H03K19/0005 ,  H04B17/11

Abstract: An integrated circuit includes a current mode transmitter. The current mode transmitter includes a first resistor and a second resistor. The resistance of the first resistor is adjusted by measuring the resistance, generating a resistance trimming code based on the measured resistance, and writing the first resistance trimming code to a first register. The resistance of the second resistor is adjusted by generating a second resistance trimming code based on the first resistance trimming code and writing the second resistance trimming code to a second register.