公开(公告)号：US20020027475A1

公开(公告)日：2002-03-07

申请号：US09886852

申请日：2001-06-21

Applicant: STMicroelectronics S.A.

Inventor： Didier Belot

IPC: H03F003/45

CPC classification number: H03F3/191 ,  H03F3/45089 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45316 ,  H03F2203/45386 ,  H03F2203/45554 ,  H03F2203/45704

Abstract: The amplifier includes an input amplifier stage, an output amplifier stage cascode-connected with the input amplifier stage, and a load stage connected to the output stage. The load stage includes a plurality of circuits each including a capacitive component and an inductive component having a Q greater than 10, and having respective different resonant frequencies. All the gain curves respectively associated with all the circuits have, to within a stated tolerance, the same maximum gain value at the resonant frequencies. The gain curves respectively associated with two circuits having respective immediately adjacent resonant frequencies overlap below a threshold 3 dB, to within a stated tolerance, below the maximum gain value.

Abstract translation: 放大器包括输入放大器级，与输入放大级级共源共栅放大器级的输出放大器级和连接到输出级的负载级。 负载级包括多个电路，每个电路包括电容分量和Q大于10的电感分量，并且具有各自不同的谐振频率。 分别与所有电路相关联的所有增益曲线在所述公差内具有在谐振频率下相同的最大增益值。 分别与具有相应的紧邻谐振频率的两个电路相关联的增益曲线重叠在阈值3dB以下，达到所述公差之内，低于最大增益值。

公开(公告)号：US20020121649A1

公开(公告)日：2002-09-05

申请号：US10068308

申请日：2002-02-05

Applicant: STMicroelectronics S.A.

Inventor： Didier Belot

IPC: H01L031/0328

CPC classification number: H01L27/0248 ,  H01L29/0603 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure of protection of an area of a semiconductor wafer including a lightly-doped substrate of a first conductivity type against high-frequency noise likely to be injected from components formed in the upper portion of a second area of the wafer. The structure includes a very heavily-doped wall of the first conductivity type having substantially the depth of the upper portion. The wall is divided into segments, each of which is connected to a ground plane.

Abstract translation: 包括半导体晶片的区域的保护结构，该半导体晶片的区域包括第一导电类型的轻掺杂衬底，以抵抗可能从形成在晶片的第二区域的上部的部件注入的高频噪声。 该结构包括基本上具有上部深度的第一导电类型的非常重掺杂的壁。 墙被分成段，每个段连接到接地平面。

公开(公告)号：US20020140510A1

公开(公告)日：2002-10-03

申请号：US10106875

申请日：2002-03-26

Applicant: STMicroelectronics S.A.

Inventor： Patrice Garcia ,  Didier Belot

IPC: H03G003/10

CPC classification number: H03G1/0088

Abstract: An amplifier device with gain switching includes an amplifier, and a configurable load circuit including an inductive element. The configurable load circuit is capable of exhibiting two configurations having two different impedance values. A controllable switch is connected between the amplifier and the load circuit to select one of the two configurations of the load circuit. The load circuit includes two insulated-gate field effect load transistors connected in series, and which operate in a triode mode. The inductive element is connected in parallel with the pair of load transistors, and between a power supply terminal and the switching circuit.

Abstract translation: 具有增益切换的放大器装置包括放大器和包括电感元件的可配置负载电路。 可配置负载电路能够呈现具有两个不同阻抗值的两种配置。 放大器和负载电路之间连接一个可控开关，选择负载电路的两种配置之一。 负载电路包括两个串联连接的绝缘栅场效应负载晶体管，工作在三极管模式。 电感元件与一对负载晶体管并联连接在电源端子和开关电路之间。