公开(公告)号：US09401328B2

公开(公告)日：2016-07-26

申请号：US14865261

申请日：2015-09-25

Applicant: STMicroelectronics S.r.l.

Inventor： Andrea Paleari ,  Lorenzo Gola ,  Federica Ronchi ,  Sonia Pirotta

IPC: H01L23/52 ,  H01L23/532 ,  H01L21/768 ,  H01L23/528 ,  H01L21/288 ,  H01L21/285

CPC classification number: H01L23/53238 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/2885 ,  H01L21/76804 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76877 ,  H01L23/5283 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An electric contact structure includes a first structural layer; a second structural layer made of dielectric material extending over the first structural layer; and an intermediate layer made of conductive material extending between the first structural layer and the second structural layer. A trench extends in the second structural layer delimited laterally by a wall of the second structural layer and at the bottom by a surface region of the intermediate layer. A diffusion barrier extends in the trench covering the surface region of the intermediate layer and the wall of the second structural layer. The diffusion barrier is a TiW—TiN—TiW tri-layer.

Abstract translation: 电接触结构包括第一结构层; 由在第一结构层上延伸的介电材料制成的第二结构层; 以及在第一结构层和第二结构层之间延伸的由导电材料制成的中间层。 沟槽在第二结构层中延伸，第二结构层由第二结构层的壁横向限定，底部由中间层的表面区域延伸。 扩散屏障在覆盖中间层的表面区域和第二结构层的壁的沟槽中延伸。 扩散阻挡层是TiW-TiN-TiW三层。

公开(公告)号：US10483220B2

公开(公告)日：2019-11-19

申请号：US15239545

申请日：2016-08-17

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Andrea Paleari ,  Antonella Milani ,  Lucrezia Guarino ,  Federica Ronchi

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/525 ,  H01L23/528 ,  H01L23/532

Abstract: In one embodiment, a method manufactures a semiconductor device including metallizations having peripheral portions with one or more underlying layers having marginal regions extending facing the peripheral portions. The method includes: providing a sacrificial layer to cover the marginal regions of the underlying layer, providing the metallizations while the marginal regions of the underlying layer are covered by the sacrificial layer, and removing the sacrificial layer so that the marginal regions of the underlying layer extend facing the peripheral portions in the absence of contact interface therebetween, thereby avoiding thermo-mechanical stresses.

公开(公告)号：US20170221840A1

公开(公告)日：2017-08-03

申请号：US15239545

申请日：2016-08-17

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Andrea Paleari ,  Antonella Milani ,  Lucrezia Guarino ,  Federica Ronchi

IPC: H01L23/00

Abstract: In one embodiment, a method manufactures a semiconductor device including metallizations having peripheral portions with one or more underlying layers having marginal regions extending facing the peripheral portions. The method includes: providing a sacrificial layer to cover the marginal regions of the underlying layer, providing the metallizations while the marginal regions of the underlying layer are covered by the sacrificial layer, and removing the sacrificial layer so that the marginal regions of the underlying layer extend facing the peripheral portions in the absence of contact interface therebetween, thereby avoiding thermo-mechanical stresses.