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公开(公告)号:US11557547B2
公开(公告)日:2023-01-17
申请号:US17126880
申请日:2020-12-18
Applicant: STMicroelectronics S.r.l.
Inventor: Roberto Tiziani , Mauro Mazzola
IPC: H01L23/00 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/495
Abstract: A leadframe for semiconductor devices, the leadframe comprising a die pad portion having a first planar die-mounting surface and a second planar surface opposed the first surface, the first surface and the second surface having facing peripheral rims jointly defining a peripheral outline of the die pad wherein the die pad comprises at least one package molding compound receiving cavity opening at the periphery of said first planar surface.
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公开(公告)号:US20170287730A1
公开(公告)日:2017-10-05
申请号:US15085285
申请日:2016-03-30
Applicant: STMicroelectronics S.r.l.
Inventor: Mauro Mazzola , Battista Vitali , Matteo De Santa
IPC: H01L21/48 , H01L21/56 , H01L23/482 , H01L23/492 , H01L23/31
CPC classification number: H01L21/4828 , H01L21/4825 , H01L21/4832 , H01L21/4875 , H01L21/56 , H01L21/561 , H01L23/3107 , H01L23/3171 , H01L23/4822 , H01L23/4924 , H01L23/49582 , H01L24/10 , H01L2224/16245 , H01L2224/97 , H01L2924/181 , H01L2924/00012
Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.
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公开(公告)号:US10741415B2
公开(公告)日:2020-08-11
申请号:US16195769
申请日:2018-11-19
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mauro Mazzola , Battista Vitali , Matteo De Santa
IPC: H01L23/495 , H01L23/48 , H01L29/40 , H01L23/02 , H01L23/52 , H01L21/48 , H01L23/00 , H01L21/56 , H01L23/31 , H01L23/482 , H01L23/492
Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.
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公开(公告)号:US11967544B2
公开(公告)日:2024-04-23
申请号:US17324436
申请日:2021-05-19
Applicant: STMicroelectronics S.r.l.
Inventor: Mauro Mazzola , Matteo De Santa
IPC: H01L23/495 , H01L21/50 , H01L23/00
CPC classification number: H01L23/4951 , H01L21/50 , H01L23/49541 , H01L23/49575 , H01L24/74
Abstract: In providing electrical wire-like connections between at least one semiconductor die arranged on a semiconductor die mounting area of a substrate and an array of electrically-conductive leads in the substrate, pressure force is applied to the electrically-conductive leads in the substrate during bonding the wire-like connections to the electrically-conductive leads. Such a pressure force is applied to the electrically-conductive leads in the substrate via a pair of mutually co-operating force transmitting surfaces. These surfaces include a first convex surface engaging a second concave surface.
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公开(公告)号:US10141197B2
公开(公告)日:2018-11-27
申请号:US15085285
申请日:2016-03-30
Applicant: STMicroelectronics S.r.l.
Inventor: Mauro Mazzola , Battista Vitali , Matteo De Santa
IPC: H01L23/495 , H01L23/48 , H01L29/40 , H01L23/02 , H01L23/52 , H01L21/48 , H01L21/56 , H01L23/31 , H01L23/482 , H01L23/492
Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.
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公开(公告)号:US20190088503A1
公开(公告)日:2019-03-21
申请号:US16195769
申请日:2018-11-19
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mauro Mazzola , Battista Vitali , Matteo De Santa
IPC: H01L21/48 , H01L23/31 , H01L23/495 , H01L23/492 , H01L23/482 , H01L21/56 , H01L23/00
Abstract: A method of making a package is disclosed. The method may include forming bond pads on a first surface of a substrate, forming leads in the substrate by etching recesses in a second surface of the substrate, the second surface being opposite the first surface, and plating at least a portion of a top surface of the leads with a layer of finish plating. The method may also include thermosonically bonding the leads to a die by thermosonically bonding the finish plating to the die and encapsulating the die and the leads in an encapsulant.
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