公开(公告)号：US11557547B2

公开(公告)日：2023-01-17

申请号：US17126880

申请日：2020-12-18

Applicant: STMicroelectronics S.r.l.

Inventor： Roberto Tiziani ,  Mauro Mazzola

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

Abstract: A leadframe for semiconductor devices, the leadframe comprising a die pad portion having a first planar die-mounting surface and a second planar surface opposed the first surface, the first surface and the second surface having facing peripheral rims jointly defining a peripheral outline of the die pad wherein the die pad comprises at least one package molding compound receiving cavity opening at the periphery of said first planar surface.

公开(公告)号：US12040263B2

公开(公告)日：2024-07-16

申请号：US17487772

申请日：2021-09-28

Applicant: STMicroelectronics S.r.l.

Inventor： Roberto Tiziani

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/15 ,  H01L23/31 ,  H01L23/488 ,  H01L23/495 ,  H01L23/522 ,  H01L23/538

CPC classification number: H01L23/49822 ,  H01L23/15 ,  H01L23/3107 ,  H01L23/488 ,  H01L23/49541 ,  H01L23/49575 ,  H01L23/49838 ,  H01L23/49872 ,  H01L23/522 ,  H01L23/5389 ,  H01L24/45 ,  H01L24/73 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/4824 ,  H01L2924/181

Abstract: A packaged semiconductor device includes a substrate having a first surface and a second surface opposite the first surface. At least one semiconductor die is mounted at the first surface of the substrate. Electrically-conductive leads are arranged around the substrate, and electrically-conductive formations couple the at least one semiconductor die to selected leads of the electrically-conductive leads. A package molding material is molded onto the at least one semiconductor die, onto the electrically-conductive leads and onto the electrically-conductive formations. The package molding material leaves the second surface of the substrate uncovered by the package molding material. The substrate is formed by a layer of electrically-insulating material.

公开(公告)号：US11626379B2

公开(公告)日：2023-04-11

申请号：US17199340

申请日：2021-03-11

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Roberto Tiziani ,  Guendalina Catalano

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/495

Abstract: A method comprises molding laser direct structuring material onto at least one semiconductor die, forming resist material on the laser direct structuring material, producing mutually aligned patterns of electrically-conductive formations in the laser direct structuring material and etched-out portions of the resist material having lateral walls sidewise of said electrically-conductive formations via laser beam energy, and forming electrically-conductive material at said etched-out portions of the resist material, the electrically-conductive material having lateral confinement surfaces at said lateral walls of said etched-out portions of the resist material.

公开(公告)号：US11749588B2

公开(公告)日：2023-09-05

申请号：US17120996

申请日：2020-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Michele Derai ,  Roberto Tiziani

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/49805 ,  H01L21/4839 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49866

Abstract: A semiconductor device comprises at least one semiconductor die electrically coupled to a set of electrically conductive leads, and package molding material molded over the at least one semiconductor die and the electrically conductive leads. At least a portion of the electrically conductive leads is exposed at a rear surface of the package molding material to provide electrically conductive pads. The electrically conductive pads comprise enlarged end portions extending at least partially over the package molding material and configured for coupling to a printed circuit board.