公开(公告)号：US20170313582A1

公开(公告)日：2017-11-02

申请号：US15651444

申请日：2017-07-17

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Perletti ,  Pietro Petruzza ,  Ilaria Gelmi ,  Laura Maria Castoldi

IPC: B81C1/00

CPC classification number: B81C1/00888 ,  B81B2201/0257 ,  B81B2207/012

Abstract: A transducer includes a first substrate and an integrated circuit coupled to the first substrate. A sensor is electrically coupled to the integrated circuit and includes a second substrate having a first surface and a second surface opposite the first surface. The second substrate has scribe boundaries defining an outer edge of the second substrate and a chamber extending from the first surface towards but not reaching the second surface. A chamber extends from the second surface to meet the chamber from first surface. Scribe trenches in the second surface at the scribe boundaries have a width from the scribe boundary towards the chamber extending from the second surface. A membrane extends over the first surface and over the chamber extending from first surface. A plate extends from the first surface of the second substrate over the membrane.

公开(公告)号：US10322931B2

公开(公告)日：2019-06-18

申请号：US15651444

申请日：2017-07-17

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Perletti ,  Pietro Petruzza ,  Ilaria Gelmi ,  Laura Maria Castoldi

IPC: B81C1/00

Abstract: A transducer includes a first substrate and an integrated circuit coupled to the first substrate. A sensor is electrically coupled to the integrated circuit and includes a second substrate having a first surface and a second surface opposite the first surface. The second substrate has scribe boundaries defining an outer edge of the second substrate and a chamber extending from the first surface towards but not reaching the second surface. A chamber extends from the second surface to meet the chamber from first surface. Scribe trenches in the second surface at the scribe boundaries have a width from the scribe boundary towards the chamber extending from the second surface. A membrane extends over the first surface and over the chamber extending from first surface. A plate extends from the first surface of the second substrate over the membrane.

公开(公告)号：US20180086633A1

公开(公告)日：2018-03-29

申请号：US15460767

申请日：2017-03-16

Applicant: STMicroelectronics S.r.l.

Inventor： Roberto Somaschini ,  Pietro Petruzza

IPC: B81C1/00 ,  G02B5/00 ,  G02B26/08 ,  G03B21/00

CPC classification number: B81C1/00595 ,  B81B3/0083 ,  B81B2201/042 ,  B81C1/00206 ,  B81C2201/0132 ,  B81C2201/0198 ,  G02B5/003 ,  G02B26/0833 ,  G02B26/101 ,  G03B21/008 ,  G03B21/2033 ,  G03B21/28

Abstract: A roughened silicon surface is formed by a process including repetitively performed roughening cycles. Each roughening cycles including a step for depositing a non-planar polymeric layer over an area of a silicon body and a step for plasma etching the polymeric layer and the area of the silicon body etch in a non-unidirectional way. As a result, a surface portion of the silicon body is removed, in a non-uniform way, to a depth not greater than 10 nm.

公开(公告)号：US10364145B2

公开(公告)日：2019-07-30

申请号：US15460767

申请日：2017-03-16

Applicant: STMicroelectronics S.r.l.

Inventor： Roberto Somaschini ,  Pietro Petruzza

IPC: G02B26/08 ,  B81C1/00 ,  G02B5/00 ,  G03B21/28 ,  G03B21/00 ,  G02B26/10 ,  G03B21/20

Abstract: A roughened silicon surface is formed by a process including repetitively performed roughening cycles. Each roughening cycles including a step for depositing a non-planar polymeric layer over an area of a silicon body and a step for plasma etching the polymeric layer and the area of the silicon body etch in a non-unidirectional way. As a result, a surface portion of the silicon body is removed, in a non-uniform way, to a depth not greater than 10 nm.

公开(公告)号：US09731965B1

公开(公告)日：2017-08-15

申请号：US15087732

申请日：2016-03-31

Applicant: STMicroelectronics S.R.L.

Inventor： Matteo Perletti ,  Pietro Petruzza ,  Ilaria Gelmi ,  Laura Maria Castoldi

IPC: B81C1/00

CPC classification number: B81C1/00888 ,  B81B2201/0257 ,  B81B2207/012

Abstract: A method of forming semiconductor devices, such as capacitive type MEMS acoustic transducers, in a semiconductor includes forming a mask layer on a back surface of the semiconductor wafer and removing first etch portions of the mask layer and scribe trench portions of the mask layer. Each scribe trench portion is positioned in the mask layer to define a corresponding scribe boundary of a plurality of the semiconductor devices being formed in the semiconductor wafer. Etching the semiconductor wafer through the first etch portions and the scribe trench portions may be done simultaneously to form external back chambers and scribe trenches, respectively, in the semiconductor wafer. The semiconductor wafer is then cut along cutting lines in the scribe trenches to singulate individual MEMS acoustic transducers. The etching through the first and second etch portions and the scribe trench portions are dry etching of the semiconductor substrate in one embodiment.