-
公开(公告)号：US20220004509A1
公开(公告)日：2022-01-06
申请号：US17479255
申请日：2021-09-20
Applicant: STMicroelectronics S.r.l. , Proton World International N.V.
Inventor： Olivier Van Nieuwenhuyze , Amedeo Veneroso
IPC: G06F13/16 , G06F12/0842 , G06F12/14
Abstract: An embedded electronic system includes a volatile memory and a processor configured to execute a low-level operating system that manages allocation of areas of the volatile memory to a plurality of high-level operating systems. Each high-level operating system executes one or more applications. The system is configured so that execution data of one or a plurality of tasks of a first application are partly transferred, by the low-level operating system, from the volatile memory to a non-volatile memory when the execution of the task of the first application is interrupted by the execution of a task of a second application. The system is also configured so that the applications of any one of the high-level operating systems do not have access to the areas of the volatile memory allocated to the applications of all the other high-level operating systems.
-
公开(公告)号：US12045336B2
公开(公告)日：2024-07-23
申请号：US17479275
申请日：2021-09-20
Applicant: STMicroelectronics S.r.l. , Proton World International N.V.
Inventor： Olivier Van Nieuwenhuyze , Amedeo Veneroso
IPC: G06F21/53 , G06F12/0842 , G06F12/14 , G06F13/16
CPC classification number: G06F21/53 , G06F12/0842 , G06F12/14 , G06F13/1657 , G06F2221/034
Abstract: An embedded electronic system includes a volatile memory and a processor configured to execute a low-level operating system that manages allocation of areas of the volatile memory to a plurality of high-level operating systems. Each high-level operating system executes one or more of applications. The volatile memory includes a first portion reserved for execution data of a first application and a second portion intended to store execution data of a second application. The system is configured so that once the execution data of the first application are loaded in the first portion, the low-level operating system forbids unloading of the execution data of the first application from the first portion so that the execution data of the first application remain in the volatile memory in case of a deactivation or of a setting to standby of the first application.
-
公开(公告)号：US11514197B2
公开(公告)日：2022-11-29
申请号：US17010391
申请日：2020-09-02
Applicant: Proton World International N.V. , STMicroelectronics S.r.l.
Inventor： Amedeo Veneroso , Olivier Van Nieuwenhuyze
IPC: G06F21/82 , G06F21/86 , G06F21/77 , G06F13/362 , G06F9/54
Abstract: A secure device operating with a secure tamper-resistant platform including a tamper-resistant hardware platform and a virtual primary platform operating with a low level operating system performing an abstraction of resources of the hardware platform, and a secondary platform with a high level operating system providing a further abstraction of resources to applications in which respective internal hosts are embedded, the secure device including an internal host domain including the internal hosts, the secure device including a plurality of physical and/or logical input/output interfaces through which external hosts can access the internal hosts, the virtual primary platform being configured to set interactions between the external hosts and the internal hosts, wherein the internal host domain includes a further set of virtual hosts each configured to operate as a proxy between an input/output interface and an application, each input/output interface being configured to address only one among the virtual hosts.
-
公开(公告)号：US20210073425A1
公开(公告)日：2021-03-11
申请号：US17010391
申请日：2020-09-02
Applicant: Proton World International N.V. , STMicroelectronics S.r.l.
Inventor： Amedeo Veneroso , Olivier Van Nieuwenhuyze
Abstract: A secure device operating with a secure tamper-resistant platform including a tamper-resistant hardware platform and a virtual primary platform operating with a low level operating system performing an abstraction of resources of the hardware platform, and a secondary platform with a high level operating system providing a further abstraction of resources to applications in which respective internal hosts are embedded, the secure device including an internal host domain including the internal hosts, the secure device including a plurality of physical and/or logical input/output interfaces through which external hosts can access the internal hosts, the virtual primary platform being configured to set interactions between the external hosts and the internal hosts, wherein the internal host domain includes a further set of virtual hosts each configured to operate as a proxy between an input/output interface and an application, each input/output interface being configured to address only one among the virtual hosts.
-
公开(公告)号：US20220004625A1
公开(公告)日：2022-01-06
申请号：US17479275
申请日：2021-09-20
Applicant: STMicroelectronics S.r.l. , Proton World International N.V.
Inventor： Olivier Van Nieuwenhuyze , Amedeo Veneroso
IPC: G06F21/53
Abstract: An embedded electronic system includes a volatile memory and a processor configured to execute a low-level operating system that manages allocation of areas of the volatile memory to a plurality of high-level operating systems. Each high-level operating system executes one or more of applications. The volatile memory includes a first portion reserved for execution data of a first application and a second portion intended to store execution data of a second application. The system is configured so that once the execution data of the first application are loaded in the first portion, the low-level operating system forbids unloading of the execution data of the first application from the first portion so that the execution data of the first application remain in the volatile memory in case of a deactivation or of a setting to standby of the first application.
-
Patent Agency Ranking
公开(公告)号：US20230367867A1
公开(公告)日：2023-11-16
申请号：US18314677
申请日：2023-05-09
Inventor： Olivier Van Nieuwenhuyze , Amedeo Veneroso
Abstract: In an embodiment an electronic device includes at least a first electronic module, a secure element, a router configured to transmit first data between the first module and a second module and a third-party module different from the first module and the second module, wherein the electronic device is configured to verify, via an authentication method, whether the third-party module is authorized when it requests access to the first data.
-
公开(公告)号：US09820139B1
公开(公告)日：2017-11-14
申请号：US15475810
申请日：2017-03-31
Applicant: STMicroelectronics S.r.l.
Inventor： Amedeo Veneroso
IPC: H04W8/18 , H04B1/38 , H04W8/02 , H04B1/3816 , H04W8/20
CPC classification number: H04W8/183 , H04B1/3816 , H04W4/60 , H04W8/205
Abstract: A method is provided for performing a management of a multi-subscription SIM module. The multi-subscription SIM module includes at least one memory adapted to store at least a first and a second profile associated with a respective first and a second mobile network operator. The memory includes a volatile portion. The operation of storing includes installing or updating profiles by downloading one or more downloaded profiles from a remote host. The management includes selecting one or more enabled profiles including an application to be executed and allocating a partition of the volatile portion of the memory to the one or more enabled profile.
-
8.发明公开公开(公告)号：US20230335169A1
公开(公告)日：2023-10-19
申请号：US18295558
申请日：2023-04-04
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Amedeo Veneroso , Carlo Cimino
Abstract: A method of managing memory in an integrated circuit card comprising a non-volatile memory portion and a RAM memory portion, the method comprising creating in a non-volatile memory heap one or more array pointers, corresponding to one or more transient arrays to be allocated, each array pointer comprising a transient array size and a transient array address, wherein the creating comprises creating one or more array pointers comprising as transient array address a logical address of the area of the RAM memory portion in which the respective transient array is to be allocated, and assigning then in the RAM memory area memory only to transient arrays, corresponding to the respective one or more array pointers, which comprise at least a value different from zero.
-
9.发明申请公开(公告)号：US20210232916A1
公开(公告)日：2021-07-29
申请号：US17156158
申请日：2021-01-22
Applicant: STMicroelectronics S.r.l.
Inventor： Amedeo Veneroso
Abstract: An embodiment apparatus comprises a first processing system executing a first portion of a neural network comprising a first subset of a set of neural network layers providing a first intermediate output, and a second processing system receiving the first intermediate output, and operating a second portion of the neural network comprising a second subset of the set of layers providing a respective output, the second processing system configured to supply to the first processing system an output information function of the respective output, and the first processing system configured to obtain as a function of the output information a final output of the neural network. The second processing system includes a secure element storing a model of the second portion, and executes the second portion by applying the input information to the model of the second portion to provide the respective output.
-
公开(公告)号：US20180027407A1
公开(公告)日：2018-01-25
申请号：US15724500
申请日：2017-10-04
Applicant: STMicroelectronics S.r.l.
Inventor： Amedeo Veneroso
IPC: H04W8/18 , H04W8/20 , H04B1/3816
CPC classification number: H04W8/183 , H04B1/3816 , H04W4/60 , H04W8/205
Abstract: A method is provided for performing a management of a multi-subscription SIM module. The multi-subscription SIM module includes at least one memory adapted to store at least a first and a second profile associated with a respective first and a second mobile network operator. The memory includes a volatile portion. The operation of storing includes installing or updating profiles by downloading one or more downloaded profiles from a remote host. The management includes selecting one or more enabled profiles including an application to be executed and allocating a partition of the volatile portion of the memory to the one or more enabled profile.
-
-
-
-
-
-
-
-
-
Search Results
23
records
(took 0.018 seconds)
