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公开(公告)号:US09847349B1
公开(公告)日:2017-12-19
申请号:US15463493
申请日:2017-03-20
Applicant: STMicroelectronics SA
Inventor: Augustin Monroy Aguirre , Guillaume Bertrand , Philippe Cathelin , Raphael Paulin
CPC classification number: H01L27/1203 , H01L23/528 , H01L29/0649 , H01L29/0847 , H01L29/1079 , H01L29/1095 , H01L29/456 , H01L29/78615
Abstract: An integrated electronic device is supported by a substrate of a silicon on insulator type. At least one transistor is formed in and on a semiconductor film of the substrate. The transistor includes a drain region and a source region of a first conductivity type and a substrate (body) region of a second conductivity type lying under a gate region. An extension region laterally continues the substrate (body) region beyond the source and drain regions and borders, in contact with, the source region through a border region having the first conductivity type. This supports formation of an electrical connection of the source region and the substrate (body) region.
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公开(公告)号:US11496049B2
公开(公告)日:2022-11-08
申请号:US16789589
申请日:2020-02-13
Applicant: Universite de Lille , Centre National De La Recherche Scientifique , ISEN Yncrea Hauts-de-France , STMicroelectronics SA
Inventor: Angel de Dios Gonzalez Santos , Andreas Kaiser , Antoine Frappe , Philippe Cathelin , Benoit Larras
Abstract: A continuous time digital signal processing (CT DSP) token includes a first signal indicating a change has occurred and a second signal indicating a direction of the change. An amplitude generation circuit operates to generate an amplitude value x in response to the token. A power estimation circuit processes the amplitude value x to generate a digital power signal in accordance with the formula: x2±2x+1.
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