公开(公告)号：US10431688B2

公开(公告)日：2019-10-01

申请号：US15749969

申请日：2016-07-30

Applicant: Sun Yat-Sen University ,  SUN YAT-SEN UNIVERSITY CARNEGIE MELLON UNIVERSITY SHUNDE INTERNATIONAL JOINT RESEARCH INSTITUTE

Inventor： Kai Wang ,  Hai Ou ,  Jun Chen

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/78 ,  H01L31/0224 ,  H01L29/423

Abstract: The present invention discloses a thin-film transistor structure with a three-dimensional fin-shape channel and a preparation method thereof. The preparation method includes following steps: (a) depositing and etching a bottom gate electrode on a substrate; (b) depositing a bottom dielectric layer at an upper part of a structure obtained from the step (a), and sequentially depositing a semiconductor film on the bottom dielectric layer; (c) etching the semiconductor film to obtain a fin-type channel; (d) respectively depositing an ohmic contact layer, a source electrode and a drain electrode on the semiconductor film located at both sides of the fin-shape channel, and etching; (e) depositing a top dielectric layer and a top gate electrode at an upper part of a structure obtained from the step (d); and (f) etching the top gate electrode, an completing a preparation of a thin-film transistor with a dual-gate three-dimensional fin-shape channel.

公开(公告)号：US12047695B2

公开(公告)日：2024-07-23

申请号：US17914095

申请日：2020-05-15

Applicant: SUN YAT-SEN UNIVERSITY

Inventor： Kai Wang ,  Yihong Qi

IPC: H04N25/57 ,  H01L27/146

CPC classification number: H04N25/57 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14643

Abstract: Provided is a photoelectric sensor, a random accessible active pixel circuit, an image sensor and a camera. A photoelectric sensor comprises a doped region, a substrate, a doped source region, a doped drain region, and two isolation regions; wherein the doped region is arranged on a bottom surface of the substrate so as to form a photodiode; a cathode of the photodiode is formed in the doped region and is connected to a positive voltage to make the photodiode work in a reverse bias region; wherein the doped source region and the doped drain region are spaced apart on top of the substrate so as to form a field effect transistor; a source is formed on a top surface of the doped source region, and a drain is formed on the top surface of the doped drain region; wherein the two isolation regions are arranged on opposite sides of the substrate, and extend from the doped source region and the doped drain region to the doped region; wherein a gate dielectric layer and a gate between the doped source region and the doped drain region are configured sequentially upwards from the top surface of the substrate; the gate is connected to a voltage to make the field effect transistor select wide dynamic range mode or high gain mode.

公开(公告)号：US20180233599A1

公开(公告)日：2018-08-16

申请号：US15749969

申请日：2016-07-30

Applicant: Sun Yat-Sen University

Inventor： Kai Wang ,  Hai Ou ,  Jun Chen

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/78 ,  H01L31/0224

CPC classification number: H01L29/78603 ,  H01L29/42384 ,  H01L29/66 ,  H01L29/66477 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696 ,  H01L31/022408

Abstract: The present invention discloses a thin-film transistor structure with a three-dimensional fin-shape channel and a preparation method thereof. The preparation method includes following steps: (a) depositing and etching a bottom gate electrode on a substrate; (b) depositing a bottom dielectric layer at an upper part of a structure obtained from the step (a), and sequentially depositing a semiconductor film on the bottom dielectric layer; (c) etching the semiconductor film to obtain a fin-type channel; (d) respectively depositing an ohmic contact layer, a source electrode and a drain electrode on the semiconductor film located at both sides of the fin-shape channel, and etching; (e) depositing a top dielectric layer and a top gate electrode at an upper part of a structure obtained from the step (d); and (f) etching the top gate electrode, an completing a preparation of a thin-film transistor with a dual-gate three-dimensional fin-shape channel.

公开(公告)号：US12267045B2

公开(公告)日：2025-04-01

申请号：US18016596

申请日：2020-08-26

Applicant: SUN YAT-SEN UNIVERSITY

Inventor： Kai Wang ,  Huimin Li ,  Xianda Zhou

IPC: H03F1/02 ,  H03F3/16

Abstract: Provided is a weak-signal reading circuit for a sensor, comprising a sensing signal input amplifying unit and a signal reading unit. The sensing signal input amplifying unit comprises a first transistor, wherein a gate and a drain of the first transistor are connected with a sensor; the signal reading unit is connected to a source of the first transistor, the first transistor is turned on when the sensor generates a sensing signal, so that the sensing signal is captured by the signal reading unit. When the sensor senses a signal and generates a voltage, the first transistor tends to be switched on, then the signal reading unit reads the sensing signal through the first transistor which has been turned on, that is, by providing the first transistor, the weak-signal reading circuit for sensor can be self-driven according to the voltage generated by the sensor without an extra drive circuit, thereby achieving low power consumption.