公开(公告)号：US6004867A

公开(公告)日：1999-12-21

申请号：US990070

申请日：1997-12-12

申请人： Sam Il Kim ,  Young Rae Cho

发明人： Sam Il Kim ,  Young Rae Cho

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H01L21/30

CPC分类号： H01L24/81 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/13144 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/30107

摘要： A chip-size package includes a semiconductor chip having a plurality of input/output pads on an active surface and a passivation layer covering the active surface such that the pads are exposed. Attached to the chip is a substrate having a plurality of electrically conductive traces and corresponding terminal pads therein. A bottom portion of each of the traces is exposed at the bottom surface of the substrate so that the traces are mechanically and electrically bonded to one of the input/output pads. The terminal pads are formed on a top portion of each of the traces and are exposed to a top surface of the substrate. Accordingly, the terminal pads are not limited to being located over the center or the periphery of the chip where the input/output pads are located, but rather can be arranged over the entire area of the chip to produce a chip-size package capable of mass production.

摘要翻译： 芯片尺寸封装包括在有源表面上具有多个输入/输出焊盘的半导体芯片和覆盖有源表面的钝化层，使得焊盘露出。 连接到芯片的是具有多个导电迹线和相应的端子焊盘的衬底。 每个迹线的底部暴露在基板的底表面处，使得迹线机械地和电气地结合到输入/输出焊盘之一。 端子焊盘形成在每个迹线的顶部上并暴露于衬底的顶表面。 因此，端子焊盘不限于位于输入/输出焊盘所在​​芯片的中心或周边上，而是可以布置在芯片的整个区域上，以产生能够 大量生产。