公开(公告)号：US20240231903A1

公开(公告)日：2024-07-11

申请号：US18614639

申请日：2024-03-23

Applicant: SambaNova Systems, Inc.

Inventor： Qi ZHENG ,  Arnav GOEL ,  Conrad Alexander TURLIK ,  Guoyao FENG ,  Joshua Earle POLZIN ,  Fansheng CHENG ,  Ravinder KUMAR ,  Greg DYKEMA ,  Subhra MAZUMDAR ,  Milad SHARIF ,  Jiayu BAI ,  Neal SANGHVI ,  Arjun SABNIS ,  Letao CHEN

IPC: G06F9/48 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F9/3877

Abstract: In a computer-implemented method a Dynamic Transfer Engine (DTE) included in a computing system receives a dynamic stimulus associated with transfer of stage data during execution of a dataflow application by the system. The DTE determines, based on source and destination devices of the transfer, a transfer method and a transfer channel to transfer the stage data between memories coupled to the source and destination devices. The DTE acquires, hardware resources of the computing system to transfer the stage using the channel and, initiates the transfer. A computer program product can cause one or more processors to perform the method. A computing system can comprise source and destination processors and memories, hardware channels to transfer data between the memories, a resource manager, and a DTE configured to perform the method.

公开(公告)号：US20230297527A1

公开(公告)日：2023-09-21

申请号：US18121224

申请日：2023-03-14

Applicant: SambaNova Systems, Inc.

Inventor： Conrad Alexander TURLIK ,  Sudhakar DINDUKURTI ,  Anand MISRA ,  Arjun SABNIS ,  Milad SHARIF ,  Ravinder KUMAR ,  Joshua Earle POLZIN ,  Arnav GOEL ,  Steven DAI

IPC: G06F13/28

CPC classification number: G06F13/28 ,  G06F2213/3808

Abstract: A system is presented that includes two data processing systems that are coupled via a network, each data processing system including a reconfigurable processor with a reconfigurable processor memory, a host that is coupled to the reconfigurable processor and that includes a host processor and a host memory that is coupled to the host processor, and a network interface controller (NIC) that is operatively coupled to the reconfigurable processor and to the host processor. The reconfigurable processor of one of the data processing systems is configured to implement a virtual function that uses a virtual address for a memory access operation. An application programming interface (API) in the host processor translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct memory access operation at the reconfigurable processor memory or the host memory of the other data processing system.

公开(公告)号：US20240338340A1

公开(公告)日：2024-10-10

申请号：US18243994

申请日：2023-09-08

Applicant: SambaNova Systems, Inc.

Inventor： Arnav GOEL ,  Ravinder KUMAR ,  Arjun SABNIS ,  Qi ZHENG ,  Neal SANGHVI

IPC: G06F15/80 ,  G06F15/82

CPC classification number: G06F15/80 ,  G06F15/825

Abstract: A data processing system including an array of reconfigurable units and a compiler configured to generate to execute a dataflow graph of a user application is disclosed. The dataflow graph includes a sequence of temporal partitions, each temporal partition including a sequence of graph control operations. Also disclosed is an intelligent graph orchestration and execution engine (IGOEE) configured to receive an optimization objective from the complier. The optimization objective can be for minimizing execution time of the reconfigurable processor or maximizing computing resource utilization of the reconfigurable processor. The IGOEE can reorganize the sequence of temporal partitions and the sequence of graph control operations within each temporal partition to satisfy the optimization objective; and execute the reorganized dataflow graph on the reconfigurable processor. A corresponding method is also disclosed herein.

公开(公告)号：US20230385103A1

公开(公告)日：2023-11-30

申请号：US18200210

申请日：2023-05-22

Applicant: SambaNova Systems, Inc.

Inventor： Qi ZHENG ,  Ravinder KUMAR ,  Arnav GOEL ,  Po-Yu WU ,  Arjun SABNIS ,  Joshua Earle POLZIN

IPC: G06F9/48 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F9/3877

Abstract: In a method an Intelligent Data Conversion (IDC) engine of a dataflow system detects a stage transition of a dataflow application executing on the dataflow system. In response, the IDC engine determines that data among stage data of the application has a first Stage Data Format (SDF). The IDC engine determines that a first processing unit of the dataflow system can process data having a second SDF and determines a data conversion to convert data among the stage data to have the second SDF. The IDC engine also determines a second processing unit, of the dataflow system to perform the data conversion and dispatches the second processing unit to perform the data conversion. The dataflow computing system can include a runtime processor and the IDC engine can interact with the runtime processor to detect the stage transition and/or dispatch the first processing unit.

公开(公告)号：US20230205585A1

公开(公告)日：2023-06-29

申请号：US18084013

申请日：2022-12-19

Applicant: SambaNova Systems, Inc.

Inventor： Ranen CHATTERJEE ,  Ravinder KUMAR ,  Raghunath SHENBAGAM ,  Maran WILSON ,  Conrad Alexander TURLIK ,  Arnav GOEL ,  Arjun SABNIS ,  Yannan CHEN

IPC: G06F9/50 ,  G06F9/30 ,  G06F9/54 ,  G06F13/40

CPC classification number: G06F9/5016 ,  G06F9/545 ,  G06F9/30123 ,  G06F13/4059 ,  G06F2209/5011

Abstract: A data processing system includes a runtime processor and a pool of reconfigurable data flow resources with memory units, busses, and arrays of physical configurable units. The runtime processor is operatively coupled to the pool of reconfigurable data flow resources and configured to load first and second configuration files for executing first and second user applications on first and second subsets of the arrays of physical configurable units and to assign first and second subsets of the memory units to the first and second user applications. The runtime processor starts execution of the first and second user applications on the first and second subsets of the arrays of physical configurable units, prevents the first user application from accessing the resources allocated to the second user application, and prevents the second user application from accessing resources allocated to the first user application.