公开(公告)号：US20240202046A1

公开(公告)日：2024-06-20

申请号：US18083403

申请日：2022-12-16

Applicant: SambaNova Systems, Inc.

Inventor： Anand MISRA ,  Conrad Alexander TURLIK ,  Maran WILSON ,  Anand VAYYALA ,  Raghu SHENBAGAM ,  Ranen CHATTERJEE ,  Pushkar Shridhar NANDKAR ,  Shivam RAIKUNDALIA

IPC: G06F9/50 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F9/5077 ,  G06F9/5016 ,  G06F13/4081 ,  G06F13/4221 ,  G06F2209/5011

Abstract: A data processing system comprises a pool of reconfigurable data flow resources with arrays of physical configurable units, a controller, and a runtime processor. The controller is configured to generate a hot-plug event in response to detecting a removal of an unallocated array of physical configurable units from the pool of reconfigurable data flow resources. The runtime processor is configured to execute user applications on a subset of the arrays of physical configurable units and to receive the hot-plug event from the controller. The runtime processor is further configured to make the removed unallocated array of physical configurable units unavailable for subsequent allocations of subsequent virtual data flow resources and subsequent executions of subsequent user applications, while the subset of the arrays of physical configurable units continues the execution of the user applications.

公开(公告)号：US20230205613A1

公开(公告)日：2023-06-29

申请号：US18087104

申请日：2022-12-22

Applicant: SambaNova Systems, Inc.

Inventor： Joshua POLZIN ,  Conrad Alexander TURLIK ,  Arnav GOEL ,  Qi ZHENG ,  Maran WILSON ,  Neal SANGHVI

IPC: G06F9/54 ,  G06F9/50

CPC classification number: G06F9/544 ,  G06F9/5016

Abstract: A method of pipelining execution stages of a pipelined application can comprise a Buffer Pipeline Manager (BPM) of a Buffer Pipelined Application computing System (BPAS) allocating pipeline buffers, configuring access to the pipeline buffers by stage processors of the system, transferring buffers from one stage processor to a successor stage processor, and transferring data from a buffer in one memory to a buffer in an alternative memory. The BPM can allocate the buffers based on execution parameters associated with the pipelined application and/or stage processors. The BPM can transfer data to a buffer in an alternative memory based on performance, capacity, and/or topological attributes of the memories and/or processors utilizing the memories. The BPM can perform operations of the method responsive to interfaces of a Pipeline Programming Interface (PPI). A BPAS can comprise hardware processors, physical memories, stage processors, an application execution program, the PPI, and the BPM.

公开(公告)号：US20230205585A1

公开(公告)日：2023-06-29

申请号：US18084013

申请日：2022-12-19

Applicant: SambaNova Systems, Inc.

Inventor： Ranen CHATTERJEE ,  Ravinder KUMAR ,  Raghunath SHENBAGAM ,  Maran WILSON ,  Conrad Alexander TURLIK ,  Arnav GOEL ,  Arjun SABNIS ,  Yannan CHEN

IPC: G06F9/50 ,  G06F9/30 ,  G06F9/54 ,  G06F13/40

CPC classification number: G06F9/5016 ,  G06F9/545 ,  G06F9/30123 ,  G06F13/4059 ,  G06F2209/5011

Abstract: A data processing system includes a runtime processor and a pool of reconfigurable data flow resources with memory units, busses, and arrays of physical configurable units. The runtime processor is operatively coupled to the pool of reconfigurable data flow resources and configured to load first and second configuration files for executing first and second user applications on first and second subsets of the arrays of physical configurable units and to assign first and second subsets of the memory units to the first and second user applications. The runtime processor starts execution of the first and second user applications on the first and second subsets of the arrays of physical configurable units, prevents the first user application from accessing the resources allocated to the second user application, and prevents the second user application from accessing resources allocated to the first user application.

公开(公告)号：US20240273057A1

公开(公告)日：2024-08-15

申请号：US18635114

申请日：2024-04-15

Applicant: SambaNova Systems, Inc.

Inventor： Greg DYKEMA ,  Maran WILSON ,  Guoyao FENG ,  Kuan ZHOU ,  Tianyu SUN ,  Taylor LEE ,  Kin Hing LEUNG ,  Arnav GOEL ,  Conrad Alexander TURLIK ,  Milad SHARIF

IPC: G06F15/80 ,  G06F8/41 ,  G06F15/78

CPC classification number: G06F15/8038 ,  G06F8/443 ,  G06F8/447 ,  G06F8/45 ,  G06F15/7867 ,  G06F15/80

Abstract: A host system for executing an application on first and/or second reconfigurable processors is presented. The host system is operatively coupled to the first and second reconfigurable processors, whereby the first reconfigurable processors have a first architecture, and the second reconfigurable processors have a second architecture that is different than the first architecture. The host system allocates reconfigurable processors of the first and/or second reconfigurable processors for executing the application and includes an auto-discovery module that is configured to determine whether the allocated reconfigurable processors include at least one of the first reconfigurable processors.

公开(公告)号：US20240231903A1

公开(公告)日：2024-07-11

申请号：US18614639

申请日：2024-03-23

Applicant: SambaNova Systems, Inc.

Inventor： Qi ZHENG ,  Arnav GOEL ,  Conrad Alexander TURLIK ,  Guoyao FENG ,  Joshua Earle POLZIN ,  Fansheng CHENG ,  Ravinder KUMAR ,  Greg DYKEMA ,  Subhra MAZUMDAR ,  Milad SHARIF ,  Jiayu BAI ,  Neal SANGHVI ,  Arjun SABNIS ,  Letao CHEN

IPC: G06F9/48 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F9/3877

Abstract: In a computer-implemented method a Dynamic Transfer Engine (DTE) included in a computing system receives a dynamic stimulus associated with transfer of stage data during execution of a dataflow application by the system. The DTE determines, based on source and destination devices of the transfer, a transfer method and a transfer channel to transfer the stage data between memories coupled to the source and destination devices. The DTE acquires, hardware resources of the computing system to transfer the stage using the channel and, initiates the transfer. A computer program product can cause one or more processors to perform the method. A computing system can comprise source and destination processors and memories, hardware channels to transfer data between the memories, a resource manager, and a DTE configured to perform the method.

公开(公告)号：US20230297527A1

公开(公告)日：2023-09-21

申请号：US18121224

申请日：2023-03-14

Applicant: SambaNova Systems, Inc.

Inventor： Conrad Alexander TURLIK ,  Sudhakar DINDUKURTI ,  Anand MISRA ,  Arjun SABNIS ,  Milad SHARIF ,  Ravinder KUMAR ,  Joshua Earle POLZIN ,  Arnav GOEL ,  Steven DAI

IPC: G06F13/28

CPC classification number: G06F13/28 ,  G06F2213/3808

Abstract: A system is presented that includes two data processing systems that are coupled via a network, each data processing system including a reconfigurable processor with a reconfigurable processor memory, a host that is coupled to the reconfigurable processor and that includes a host processor and a host memory that is coupled to the host processor, and a network interface controller (NIC) that is operatively coupled to the reconfigurable processor and to the host processor. The reconfigurable processor of one of the data processing systems is configured to implement a virtual function that uses a virtual address for a memory access operation. An application programming interface (API) in the host processor translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct memory access operation at the reconfigurable processor memory or the host memory of the other data processing system.

公开(公告)号：US20230409395A1

公开(公告)日：2023-12-21

申请号：US18211962

申请日：2023-06-20

Applicant: SambaNova Systems, Inc.

Inventor： Ravinder KUMAR ,  Conrad Alexander TURLIK ,  Arnav GOEL ,  Qi ZHENG ,  Raghunath SHENBAGAM ,  Anand MISRA ,  Ananda Reddy VAYYALA

IPC: G06F9/50 ,  G06F15/78

CPC classification number: G06F9/5011 ,  G06F9/5016 ,  G06F15/7871 ,  G06F15/7867 ,  G06F9/5077 ,  G06F2209/501 ,  G06F2209/5011

Abstract: A data processing system comprises a pool of reconfigurable data flow resources and a runtime processor. The pool of reconfigurable data flow resources includes arrays of physical configurable units and memory. The runtime processor includes logic to receive a plurality of configuration files for user applications. The configuration files include configurations of virtual data flow resources required to execute the user applications. The runtime processor also includes logic to allocate physical configurable units and memory in the pool of reconfigurable data flow resources to the virtual data flow resources and load the configuration files to the allocated physical configurable units. The runtime processor further includes logic to execute the user applications using the allocated physical configurable units and memory.

公开(公告)号：US20230205614A1

公开(公告)日：2023-06-29

申请号：US18087125

申请日：2022-12-22

Applicant: SambaNova Systems, Inc.

Inventor： Joshua POLZIN ,  Conrad Alexander TURLIK ,  Arnav GOEL ,  Qi ZHENG ,  Maran WILSON ,  Neal SANGHVI

IPC: G06F9/54

CPC classification number: G06F9/544

Abstract: A method of pipelining execution stages of a pipelined application comprises an application execution program (AEP) utilizing a Pipeline Programming Interface (PPI) of a Buffer Pipelined Application computing System (BPAS). In the method the AEP uses one interface of the PPI to determine buffers, among a set of pipeline buffers stored in physical memories of the BPAS, for the BPAS to execute operations a computing application using batches of application data. The AEP uses a second interface of the PPI to load data batches into pipeline buffers, and a third interface of the PPI to input the buffers to the BPAS for executing operations of the application. The AEP can use another interface of the PPI to allocate the buffers in particular physical memories of the BPAS. A computing system can comprise the AEP and BPAS, and can perform the method.

公开(公告)号：US20220012077A1

公开(公告)日：2022-01-13

申请号：US16922975

申请日：2020-07-07

Applicant: SambaNova Systems, Inc.

Inventor： Ravinder KUMAR ,  Conrad Alexander TURLIK ,  Arnav GOEL ,  Qi ZHENG ,  Raghunath SHENBAGAM ,  Anand MISRA ,  Ananda Reddy VAYYALA

IPC: G06F9/455 ,  G06F9/50 ,  G06F9/54 ,  G06F13/16 ,  G06F12/10

Abstract: A data processing system comprises a pool of reconfigurable data flow resources and a runtime processor. The pool of reconfigurable data flow resources includes arrays of physical configurable units and memory. The runtime processor includes logic to receive a plurality of configuration files for user applications. The configuration files include configurations of virtual data flow resources required to execute the user applications. The runtime processor also includes logic to allocate physical configurable units and memory in the pool of reconfigurable data flow resources to the virtual data flow resources and load the configuration files to the allocated physical configurable units. The runtime processor further includes logic to execute the user applications using the allocated physical configurable units and memory.