-
公开(公告)号：US09928766B2
公开(公告)日：2018-03-27
申请号：US14084965
申请日：2013-11-20
发明人： Jong-Yun Kim , Jin-Taek Kim , Cheol-Ho Yu , Bong-Won Lee
IPC分类号： G09G3/00
CPC分类号： G09G3/006
摘要： A test structure includes a terminal pattern, a first extending part, a second extending part and a measuring part. The terminal pattern includes a first terminal part, a second terminal part, a third terminal part and a fourth terminal part sequentially disposed and spaced apart from each other in a first direction. The first extending part is connected to the first terminal part and the second terminal part. The first extending part extends in a second direction crossing the first direction. The second extending part is connected to the third terminal part and the fourth terminal part. The second extending part extends in the second direction. The measuring part partially overlaps the first extending part and the second extending part.
-
公开(公告)号：US10937838B2
公开(公告)日：2021-03-02
申请号：US16530213
申请日：2019-08-02
发明人： Jin-Seock Kim , Jong-Hee Park , Bong-Won Lee , Seung-Bae Kang , Sang-Gab Kim , Jeong-Min Park , Hyun-Eok Shin
摘要： An OLED display device includes a substrate including a display region and a pad region, a display structure in the display region on the substrate, and a pad electrode structure in the pad region on the substrate, the pad electrode structure having a first pad electrode on the substrate, a first insulation layer covering opposite lateral portions of the first pad electrode and exposing a portion of an upper surface of the first pad electrode, a second pad electrode on the first pad electrode and on the first insulation layer, the second pad electrode having a step portion where the first pad electrode and the first insulation layer are overlapped, and a third pad electrode on the second pad electrode and on the first insulation layer, the third electrode covering the second pad electrode.
-
3.发明申请TEST STRUCTURE, ARRAY SUBSTRATE HAVING THE SAME AND METHOD OF MEASURING SHEET RESISTANCE USING THE SAME 有权测试结构，具有该结构的阵列基板和使用该测量结构的测量板电阻的方法公开(公告)号：US20150015296A1
公开(公告)日：2015-01-15
申请号：US14084965
申请日：2013-11-20
发明人： JONG-YUN KIM , Jin-Taek Kim , Cheol-Ho Yu , Bong-Won Lee
IPC分类号： G09G3/00
CPC分类号： G09G3/006
摘要： A test structure includes a terminal pattern, a first extending part, a second extending part and a measuring part. The terminal pattern includes a first terminal part, a second terminal part, a third terminal part and a fourth terminal part sequentially disposed and spaced apart from each other in a first direction. The first extending part is connected to the first terminal part and the second terminal part. The first extending part extends in a second direction crossing the first direction. The second extending part is connected to the third terminal part and the fourth terminal part. The second extending part extends in the second direction. The measuring part partially overlaps the first extending part and the second extending part.
摘要翻译： 测试结构包括端子图案，第一延伸部分，第二延伸部分和测量部分。 端子图案包括沿第一方向彼此依次布置和间隔开的第一端子部分，第二端子部分，第三端子部分和第四端子部分。 第一延伸部分连接到第一端子部分和第二端子部分。 第一延伸部分沿与第一方向交叉的第二方向延伸。 第二延伸部分连接到第三端子部分和第四端子部分。 第二延伸部分沿第二方向延伸。 测量部分与第一延伸部分和第二延伸部分重叠。
-
公开(公告)号：US10790448B2
公开(公告)日：2020-09-29
申请号：US15689396
申请日：2017-08-29
发明人： Chan-Woo Yang , Seung-Bae Kang , Han-Su Kim , Bong-Won Lee
摘要： A flexible electrode for a display device may include a conductive structure including a lower conductive pattern disposed on a substrate and an upper conductive pattern disposed on the lower conductive pattern, and an electrode layer disposed on the substrate, the electrode layer being adjacent to the conductive structure. A width of a top surface of the lower conductive pattern may be less than a width of a bottom surface of the upper conductive pattern.
-
公开(公告)号：US10381418B2
公开(公告)日：2019-08-13
申请号：US15678640
申请日：2017-08-16
发明人： Jin-Seock Kim , Jong-Hee Park , Bong-Won Lee , Seung-Bae Kang , Sang-Gab Kim , Jeong-Min Park , Hyun-Eok Shin
摘要： An OLED display device includes a substrate including a display region and a pad region, a display structure in the display region on the substrate, and a pad electrode structure in the pad region on the substrate, the pad electrode structure having a first pad electrode on the substrate, a first insulation layer covering opposite lateral portions of the first pad electrode and exposing a portion of an upper surface of the first pad electrode, a second pad electrode on the first pad electrode and on the first insulation layer, the second pad electrode having a step portion where the first pad electrode and the first insulation layer are overlapped, and a third pad electrode on the second pad electrode and on the first insulation layer, the third electrode covering the second pad electrode.
-
6.发明授权公开(公告)号：US09224831B2
公开(公告)日：2015-12-29
申请号：US14140944
申请日：2013-12-26
发明人： Bong-Won Lee
IPC分类号： H01L21/336 , H01L21/84 , H01L29/66 , H01L29/786 , H01L27/12
CPC分类号： H01L29/66477 , H01L27/1288 , H01L29/66765 , H01L29/66969 , H01L29/78618 , H01L29/7869
摘要： Disclosed is a method of manufacturing an oxide semiconductor device, including: forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming an active pattern on the gate insulating layer; forming a first mask pattern on the gate insulating layer and the active pattern; forming an insulating interlayer on the gate insulating layer, the active pattern, and the first mask pattern; forming a second mask pattern on the insulating interlayer, the second mask pattern comprising an opening that exposes a region where the first mask pattern is formed; forming contact holes exposing portions of the active pattern by patterning the insulating interlayer using the first mask pattern and the second mask pattern; and forming a source electrode and a drain electrode on the gate insulating layer by filling the contact holes, the drain electrode spaced apart from the source electrode.
摘要翻译： 公开了一种制造氧化物半导体器件的方法，包括：在衬底上形成栅电极; 在栅电极上形成栅极绝缘层; 在栅极绝缘层上形成有源图案; 在所述栅极绝缘层和所述有源图案上形成第一掩模图案; 在所述栅极绝缘层，所述有源图案和所述第一掩模图案上形成绝缘中间层; 在所述绝缘中间层上形成第二掩模图案，所述第二掩模图案包括露出形成所述第一掩模图案的区域的开口; 通过使用所述第一掩模图案和所述第二掩模图案图案化所述绝缘中间层来形成暴露所述有源图案的部分的接触孔; 以及通过填充所述接触孔，所述漏电极与所述源电极间隔开，在所述栅极绝缘层上形成源电极和漏电极。
-
-
-
-
-
搜索结果
6 条记录 (耗时 0.014 秒)
