公开(公告)号：US20180075818A1

公开(公告)日：2018-03-15

申请号：US15815006

申请日：2017-11-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung-Man KIM ,  Hong-Woo LEE ,  Jong-Hwan LEE ,  Hyeon-Hwan KIM ,  Jong-Hyuk LEE

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0465 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2320/0666

Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.

公开(公告)号：US20160322016A1

公开(公告)日：2016-11-03

申请号：US15195263

申请日：2016-06-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung-Man KIM ,  Hong-Woo LEE ,  Jong-Hwan LEE ,  Hyeon-Hwan KIM ,  Jong-Hyuk LEE

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2300/0443 ,  G09G2300/0465 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2320/0666

Abstract: A display apparatus includes: a plurality of pixel blocks, each pixel block of the plurality of pixel blocks including a first pixel electrode connected to a first switching element and a second pixel electrode connected to a second switching element; gate lines which extend along a first direction and include a first gate line connected to the first switching element and a second gate line connected to the second switching element; and data lines which extend along a second direction intersecting the first direction. A gate voltage is applied to the first gate line before the second gate line, and the first pixel electrode of each of the pixel blocks displays a same color.

Abstract translation: 显示装置包括：多个像素块，所述多个像素块中的每个像素块包括连接到第一开关元件的第一像素电极和连接到第二开关元件的第二像素电极; 栅极线，沿着第一方向延伸并且包括连接到第一开关元件的第一栅极线和连接到第二开关元件的第二栅极线; 以及沿着与第一方向相交的第二方向延伸的数据线。 栅极电压施加到第二栅极线之前的第一栅极线，并且每个像素块的第一像素电极显示相同的颜色。

公开(公告)号：US20130063331A1

公开(公告)日：2013-03-14

申请号：US13669364

申请日：2012-11-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung-Man KIM ,  Hong-Woo LEE ,  Myung-Koo HUR ,  Hee-Joon KIM

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G2310/0286 ,  G11C19/184

Abstract: A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

Abstract translation: 一种栅极驱动电路和具有该栅极驱动电路的显示装置，上拉单元在一帧的第一周期期间通过使用第一时钟信号来上拉电流门信号。 耦合到上拉单元的上拉驱动器从前一级之一接收进位信号，以接通上拉单元。 上拉单元接收来自下一级中的一个的门信号，将当前门信号放电至截止电压电平，并关闭上拉单元。 持有者将当前门信号保持在电压电平。 逆变器响应于第一个时钟信号打开/关闭支架。 波纹防止器具有与上拉单元的输出端子共同耦合的源极和栅极，以及耦合到反相器的输入端子的漏极，并且包括用于防止纹波施加到逆变器的纹波防止二极管 。

公开(公告)号：US20180061353A1

公开(公告)日：2018-03-01

申请号：US15805754

申请日：2017-11-07

Applicant: Samsung Display Co., Ltd.

Inventor： Noboru TAKEUCHI ,  Masami IGAWA ,  Min soo KANG ,  Beomjun KIM ,  YoonHo KIM ,  Seongyeol SYN ,  Hong-Woo LEE

IPC: G09G3/36 ,  G11C19/28

CPC classification number: G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.

公开(公告)号：US20160189654A1

公开(公告)日：2016-06-30

申请号：US14715792

申请日：2015-05-19

Applicant: Samsung Display Co., LTD.

Inventor： Yoon Ho KIM ,  Beom Jun KIM ,  Geun Hyuk CHOI ,  Noboru TAKEUCHI ,  Yong Soon LEE ,  Jong Hwan LEE ,  Hong-Woo LEE ,  Yong-Sik HWANG

IPC: G09G3/36

CPC classification number: G09G3/3685 ,  G09G3/3696 ,  G09G2310/08 ,  G09G2320/041 ,  G09G2320/043

Abstract: A display panel includes: a display panel including a plurality of gate lines, a plurality of data lines, and a plurality of pixels; a gate driver connected to the plurality of gate lines to apply a gate signal voltage; a data driver connected to the plurality of data lines to apply a data voltage and a negative data voltage; and a gate voltage divider for generating a gate signal voltage including gate-on and gate-off voltages to provided it to the gate driver. The gate voltage divider adjusts the gate-off voltage in accordance with a driving time of the display panel and a temperature of the display panel.

Abstract translation: 显示面板包括：显示面板，包括多条栅极线，多条数据线和多个像素; 连接到所述多个栅极线以施加栅极信号电压的栅极驱动器; 连接到所述多条数据线的数据驱动器，以施加数据电压和负数据电压; 以及栅极分压器，用于产生包括栅极导通和栅极截止电压的栅极信号电压，以将其提供给栅极驱动器。 栅极分压器根据显示面板的驱动时间和显示面板的温度调节栅极截止电压。

公开(公告)号：US20160189598A1

公开(公告)日：2016-06-30

申请号：US14755769

申请日：2015-06-30

Applicant: Samsung Display Co., LTD.

Inventor： Noboru TAKEUCHI ,  Masami IGAWA ,  Min soo KANG ,  Beomjun KIM ,  YoonHo KIM ,  Seongyeol SYN ,  Hong-Woo LEE

IPC: G09G3/20 ,  G09G3/36

CPC classification number: G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.

Abstract translation: 栅极驱动器的每个级包括控制部分，其响应于前一级的进位信号而增加升压线的电位，并且响应于下一级的进位信号而降低升压线的电位， 第一输出部，其响应于所述升压线的电位增加而接通，并接收时钟信号以输出当前级的门信号;以及第二输出部，其响应于所述升压的电位增加而导通 并接收时钟信号以输出当前级的进位信号。 本阶段的升压线设置为与连接到现阶段之后的下一级中的一个栅极线相邻。