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公开(公告)号:US20220114936A1
公开(公告)日:2022-04-14
申请号:US17469249
申请日:2021-09-08
Applicant: Samsung Display Co., LTD.
Inventor: Seung-Kyu LEE , Beomjun KIM , Sang Seop KUM
IPC: G09G3/20
Abstract: A display apparatus includes a display panel, a data driver and a gate driving circuit. The display panel includes pixels, data lines, and gate lines. The data driver applies data voltages to the data lines. The data driver includes dummy stages. The gate driving circuit applies gate signals to the gate lines, and is disposed between opening portions in a display area of the display panel. The gate driving circuit includes normal stages that output the gate signals to the gate lines. The dummy stages output a reset signal to at least one of the normal stages.
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公开(公告)号:US20180005594A1
公开(公告)日:2018-01-04
申请号:US15445025
申请日:2017-02-28
Applicant: Samsung Display Co., Ltd.
Inventor: Noboru TAKEUCHI , Jonghwan LEE , Kangnam KIM , Beomjun KIM , Hongwoo LEE , Youmee HYUN
IPC: G09G3/36 , G02F1/1335 , G02F1/1368 , G02F1/1362 , G02F1/1343
CPC classification number: G09G3/3677 , G02F1/133512 , G02F1/133514 , G02F1/134309 , G02F1/13439 , G02F1/136209 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G2310/0286 , G09G2310/08
Abstract: A display device with space for accommodating elements of a gate driver in a display area of the display device, the display device including first and second adjacent pixel electrodes, and third and fourth adjacent pixel electrodes; a gate line extending between the first pixel electrode and the second pixel electrode and between the third pixel electrode and the fourth pixel electrode; a gate driver having a plurality of elements and configured to drive the gate line; and a light blocking layer overlapping the gate line, wherein the light blocking layer comprises a first light blocking portion and a second light blocking portion, the first light blocking portion is adjacent to the first pixel electrode and the second pixel electrode, the second light blocking portion is adjacent to the third pixel electrode and the fourth pixel electrode, the second light blocking portion having a larger size than a size of the first light blocking portion, and at least one of the plurality of elements of the gate driver overlaps the second light blocking portion.
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公开(公告)号:US20180061353A1
公开(公告)日:2018-03-01
申请号:US15805754
申请日:2017-11-07
Applicant: Samsung Display Co., Ltd.
Inventor: Noboru TAKEUCHI , Masami IGAWA , Min soo KANG , Beomjun KIM , YoonHo KIM , Seongyeol SYN , Hong-Woo LEE
CPC classification number: G09G3/3677 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.
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公开(公告)号:US20160189598A1
公开(公告)日:2016-06-30
申请号:US14755769
申请日:2015-06-30
Applicant: Samsung Display Co., LTD.
Inventor: Noboru TAKEUCHI , Masami IGAWA , Min soo KANG , Beomjun KIM , YoonHo KIM , Seongyeol SYN , Hong-Woo LEE
CPC classification number: G09G3/3677 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.
Abstract translation: 栅极驱动器的每个级包括控制部分,其响应于前一级的进位信号而增加升压线的电位,并且响应于下一级的进位信号而降低升压线的电位, 第一输出部,其响应于所述升压线的电位增加而接通,并接收时钟信号以输出当前级的门信号;以及第二输出部,其响应于所述升压的电位增加而导通 并接收时钟信号以输出当前级的进位信号。 本阶段的升压线设置为与连接到现阶段之后的下一级中的一个栅极线相邻。
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